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author | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2009-08-08 13:19:10 +0000 |
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committer | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2009-08-08 13:19:10 +0000 |
commit | 9390cd0e86cb3b79f6836acab2a27b275e5bde9e (patch) | |
tree | b19a164db68eeee7f29fc43bb60d91c40b14d583 /lib/CodeGen/RegisterScavenging.cpp | |
parent | dffb051c21d32209c601ca0ca6baae75b6c6463f (diff) | |
download | external_llvm-9390cd0e86cb3b79f6836acab2a27b275e5bde9e.zip external_llvm-9390cd0e86cb3b79f6836acab2a27b275e5bde9e.tar.gz external_llvm-9390cd0e86cb3b79f6836acab2a27b275e5bde9e.tar.bz2 |
Remove RegisterScavenger::isSuperRegUsed(). This completely reverses the mistaken commit r77904.
Now there is no special treatment of instructions that redefine part of a
super-register. Instead, the super-register is marked with <imp-use,kill> and
<imp-def>. For instance, from LowerSubregs on ARM:
subreg: CONVERTING: %Q1<def> = INSERT_SUBREG %Q1<undef>, %D1<kill>, 5
subreg: %D2<def> = FCPYD %D1<kill>, 14, %reg0, %Q1<imp-def>
subreg: CONVERTING: %Q1<def> = INSERT_SUBREG %Q1, %D0<kill>, 6
subreg: %D3<def> = FCPYD %D0<kill>, 14, %reg0, %Q1<imp-use,kill>, %Q1<imp-def>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78466 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/RegisterScavenging.cpp')
-rw-r--r-- | lib/CodeGen/RegisterScavenging.cpp | 34 |
1 files changed, 2 insertions, 32 deletions
diff --git a/lib/CodeGen/RegisterScavenging.cpp b/lib/CodeGen/RegisterScavenging.cpp index bb12556..93c0eb0 100644 --- a/lib/CodeGen/RegisterScavenging.cpp +++ b/lib/CodeGen/RegisterScavenging.cpp @@ -30,35 +30,6 @@ #include "llvm/ADT/STLExtras.h" using namespace llvm; -/// RedefinesSuperRegPart - Return true if the specified register is redefining -/// part of a super-register. -static bool RedefinesSuperRegPart(const MachineInstr *MI, unsigned SubReg, - const TargetRegisterInfo *TRI) { - bool SeenSuperUse = false; - bool SeenSuperDef = false; - for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { - const MachineOperand &MO = MI->getOperand(i); - if (!MO.isReg() || MO.isUndef()) - continue; - if (TRI->isSuperRegister(SubReg, MO.getReg())) { - if (MO.isUse()) - SeenSuperUse = true; - else if (MO.isImplicit()) - SeenSuperDef = true; - } - } - - return SeenSuperDef && SeenSuperUse; -} - -bool RegScavenger::isSuperRegUsed(unsigned Reg) const { - for (const unsigned *SuperRegs = TRI->getSuperRegisters(Reg); - unsigned SuperReg = *SuperRegs; ++SuperRegs) - if (isUsed(SuperReg)) - return true; - return false; -} - /// setUsed - Set the register and its sub-registers as being used. void RegScavenger::setUsed(unsigned Reg) { RegsAvailable.reset(Reg); @@ -74,8 +45,7 @@ void RegScavenger::setUnused(unsigned Reg, const MachineInstr *MI) { for (const unsigned *SubRegs = TRI->getSubRegisters(Reg); unsigned SubReg = *SubRegs; ++SubRegs) - if (!RedefinesSuperRegPart(MI, Reg, TRI)) - RegsAvailable.set(SubReg); + RegsAvailable.set(SubReg); } void RegScavenger::initRegState() { @@ -257,7 +227,7 @@ void RegScavenger::forward() { "Using an early clobbered register!"); } else { assert(MO.isDef()); - assert((KillRegs.test(Reg) || isUnused(Reg) || isSuperRegUsed(Reg) || + assert((KillRegs.test(Reg) || isUnused(Reg) || isLiveInButUnusedBefore(Reg, MI, MBB, TRI, MRI)) && "Re-defining a live register!"); } |