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authorHal Finkel <hfinkel@anl.gov>2013-04-05 21:30:40 +0000
committerHal Finkel <hfinkel@anl.gov>2013-04-05 21:30:40 +0000
commitb6cfeb63f8192724362565567a4cb4aa642baa1d (patch)
tree64ffc7125c0514f2831d17808a3cb9ca7b10ad00 /lib/CodeGen/RegisterScavenging.cpp
parent03fceff6f69a0261a767aab8e62de8aa9301b86c (diff)
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Revert r178845 - Fix bug in PEI's virtual-register scavenging
Reverting because this breaks one of the LTO builders. Original commit message: This change fixes a bug that I introduced in r178058. After a register is scavenged using one of the available spills slots the instruction defining the virtual register needs to be moved to after the spill code. The scavenger has already processed the defining instruction so that registers killed by that instruction are available for definition in that same instruction. Unfortunately, after this, the scavenger needs to iterate through the spill code and then visit, again, the instruction that defines the now-scavenged register. In order to avoid confusion, the register scavenger needs the ability to 'back up' through the spill code so that it can again process the instructions in the appropriate order. Prior to this fix, once the scavenger reached the just-moved instruction, it would assert if it killed any registers because, having already processed the instruction, it believed they were undefined. Unfortunately, I don't yet have a small test case. Thanks to Pranav Bhandarkar for diagnosing the problem and testing this fix. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178916 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/RegisterScavenging.cpp')
-rw-r--r--lib/CodeGen/RegisterScavenging.cpp73
1 files changed, 22 insertions, 51 deletions
diff --git a/lib/CodeGen/RegisterScavenging.cpp b/lib/CodeGen/RegisterScavenging.cpp
index 07ace7a..55a66ba 100644
--- a/lib/CodeGen/RegisterScavenging.cpp
+++ b/lib/CodeGen/RegisterScavenging.cpp
@@ -110,11 +110,30 @@ void RegScavenger::addRegWithSubRegs(BitVector &BV, unsigned Reg) {
BV.set(*SubRegs);
}
-void RegScavenger::determineKillsAndDefs() {
- assert(Tracking && "Must be tracking to determine kills and defs");
+void RegScavenger::forward() {
+ // Move ptr forward.
+ if (!Tracking) {
+ MBBI = MBB->begin();
+ Tracking = true;
+ } else {
+ assert(MBBI != MBB->end() && "Already past the end of the basic block!");
+ MBBI = llvm::next(MBBI);
+ }
+ assert(MBBI != MBB->end() && "Already at the end of the basic block!");
MachineInstr *MI = MBBI;
- assert(!MI->isDebugValue() && "Debug values have no kills or defs");
+
+ for (SmallVector<ScavengedInfo, 2>::iterator I = Scavenged.begin(),
+ IE = Scavenged.end(); I != IE; ++I) {
+ if (I->Restore != MI)
+ continue;
+
+ I->Reg = 0;
+ I->Restore = NULL;
+ }
+
+ if (MI->isDebugValue())
+ return;
// Find out which registers are early clobbered, killed, defined, and marked
// def-dead in this instruction.
@@ -148,54 +167,6 @@ void RegScavenger::determineKillsAndDefs() {
addRegWithSubRegs(DefRegs, Reg);
}
}
-}
-
-void RegScavenger::unprocess() {
- assert(Tracking && "Cannot unprocess because we're not tracking");
-
- MachineInstr *MI = MBBI;
- if (MI->isDebugValue())
- return;
-
- determineKillsAndDefs();
-
- // Commit the changes.
- setUsed(KillRegs);
- setUnused(DefRegs);
-
- if (MBBI == MBB->begin()) {
- MBBI = MachineBasicBlock::iterator(NULL);
- Tracking = false;
- } else
- --MBBI;
-}
-
-void RegScavenger::forward() {
- // Move ptr forward.
- if (!Tracking) {
- MBBI = MBB->begin();
- Tracking = true;
- } else {
- assert(MBBI != MBB->end() && "Already past the end of the basic block!");
- MBBI = llvm::next(MBBI);
- }
- assert(MBBI != MBB->end() && "Already at the end of the basic block!");
-
- MachineInstr *MI = MBBI;
-
- for (SmallVector<ScavengedInfo, 2>::iterator I = Scavenged.begin(),
- IE = Scavenged.end(); I != IE; ++I) {
- if (I->Restore != MI)
- continue;
-
- I->Reg = 0;
- I->Restore = NULL;
- }
-
- if (MI->isDebugValue())
- return;
-
- determineKillsAndDefs();
// Verify uses and defs.
#ifndef NDEBUG