diff options
| author | Evan Cheng <evan.cheng@apple.com> | 2009-07-21 05:40:15 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2009-07-21 05:40:15 +0000 |
| commit | 3f8f2810f286608cd5f252354eeea26c99b53aa4 (patch) | |
| tree | 47f91aa667808478d445026acbb72ecec0af96e7 /lib/CodeGen/SelectionDAG/DAGCombiner.cpp | |
| parent | 153afcae9b32c19724f869327822a53535bbfab0 (diff) | |
| download | external_llvm-3f8f2810f286608cd5f252354eeea26c99b53aa4.zip external_llvm-3f8f2810f286608cd5f252354eeea26c99b53aa4.tar.gz external_llvm-3f8f2810f286608cd5f252354eeea26c99b53aa4.tar.bz2 | |
Fix a dagga combiner bug: avoid creating illegal constant.
Is this really a winning transformation?
fold (shl (srl x, c1), c2) -> (shl (and x, (shl -1, c1)), (sub c2, c1)) or
(srl (and x, (shl -1, c1)), (sub c1, c2))
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76535 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/SelectionDAG/DAGCombiner.cpp')
| -rw-r--r-- | lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 21 |
1 files changed, 12 insertions, 9 deletions
diff --git a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp index 4ff2a3a..370054d 100644 --- a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp +++ b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp @@ -2475,15 +2475,18 @@ SDValue DAGCombiner::visitSHL(SDNode *N) { if (N1C && N0.getOpcode() == ISD::SRL && N0.getOperand(1).getOpcode() == ISD::Constant) { uint64_t c1 = cast<ConstantSDNode>(N0.getOperand(1))->getZExtValue(); - uint64_t c2 = N1C->getZExtValue(); - SDValue Mask = DAG.getNode(ISD::AND, N0.getDebugLoc(), VT, N0.getOperand(0), - DAG.getConstant(~0ULL << c1, VT)); - if (c2 > c1) - return DAG.getNode(ISD::SHL, N->getDebugLoc(), VT, Mask, - DAG.getConstant(c2-c1, N1.getValueType())); - else - return DAG.getNode(ISD::SRL, N->getDebugLoc(), VT, Mask, - DAG.getConstant(c1-c2, N1.getValueType())); + if (c1 < VT.getSizeInBits()) { + uint64_t c2 = N1C->getZExtValue(); + SDValue Mask = DAG.getNode(ISD::AND, N0.getDebugLoc(), VT, + N0.getOperand(0), + DAG.getConstant(~0ULL << c1, VT)); + if (c2 > c1) + return DAG.getNode(ISD::SHL, N->getDebugLoc(), VT, Mask, + DAG.getConstant(c2-c1, N1.getValueType())); + else + return DAG.getNode(ISD::SRL, N->getDebugLoc(), VT, Mask, + DAG.getConstant(c1-c2, N1.getValueType())); + } } // fold (shl (sra x, c1), c1) -> (and x, (shl -1, c1)) if (N1C && N0.getOpcode() == ISD::SRA && N1 == N0.getOperand(1)) |