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| author | Mon P Wang <wangmp@apple.com> | 2009-03-18 06:24:04 +0000 |
|---|---|---|
| committer | Mon P Wang <wangmp@apple.com> | 2009-03-18 06:24:04 +0000 |
| commit | aa9df0b0c3cef33514095bde2eedead986677955 (patch) | |
| tree | 65a616aa2ebb1ed2d4b9167331b8f881b6eb2f61 /lib/CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp | |
| parent | 73673199917890087ff35ba00e78ba1b8efcb19c (diff) | |
| download | external_llvm-aa9df0b0c3cef33514095bde2eedead986677955.zip external_llvm-aa9df0b0c3cef33514095bde2eedead986677955.tar.gz external_llvm-aa9df0b0c3cef33514095bde2eedead986677955.tar.bz2 | |
Added missing support for widening when splitting an unary op (PR3683)
and expanding a bit convert (PR3711). In both cases, we extract the
valid part of the widen vector and then do the conversion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67175 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp')
| -rw-r--r-- | lib/CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/lib/CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp b/lib/CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp index 65c0020..9333120 100644 --- a/lib/CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp +++ b/lib/CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp @@ -75,6 +75,21 @@ void DAGTypeLegalizer::ExpandRes_BIT_CONVERT(SDNode *N, SDValue &Lo, Lo = DAG.getNode(ISD::BIT_CONVERT, dl, NOutVT, Lo); Hi = DAG.getNode(ISD::BIT_CONVERT, dl, NOutVT, Hi); return; + case WidenVector: { + assert(!(InVT.getVectorNumElements() & 1) && "Unsupported BIT_CONVERT"); + InOp = GetWidenedVector(InOp); + MVT InNVT = MVT::getVectorVT(InVT.getVectorElementType(), + InVT.getVectorNumElements()/2); + Lo = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, InNVT, InOp, + DAG.getIntPtrConstant(0)); + Hi = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, InNVT, InOp, + DAG.getIntPtrConstant(InNVT.getVectorNumElements())); + if (TLI.isBigEndian()) + std::swap(Lo, Hi); + Lo = DAG.getNode(ISD::BIT_CONVERT, dl, NOutVT, Lo); + Hi = DAG.getNode(ISD::BIT_CONVERT, dl, NOutVT, Hi); + return; + } } // Lower the bit-convert to a store/load from the stack. |