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author | Eric Christopher <echristo@apple.com> | 2011-03-08 19:35:47 +0000 |
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committer | Eric Christopher <echristo@apple.com> | 2011-03-08 19:35:47 +0000 |
commit | 29449448b0f0420dfcf52e278fc01adbf1690d70 (patch) | |
tree | fb727fe43b7083b57e6179c3efdc22573b963285 /lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp | |
parent | 4cdcb362891e3f945171df822174768b392986ed (diff) | |
download | external_llvm-29449448b0f0420dfcf52e278fc01adbf1690d70.zip external_llvm-29449448b0f0420dfcf52e278fc01adbf1690d70.tar.gz external_llvm-29449448b0f0420dfcf52e278fc01adbf1690d70.tar.bz2 |
Fix some latent bugs if the nodes are unschedulable. We'd gotten away
with this before since none of the register tracking or nightly tests
had unschedulable nodes.
This should probably be refixed with a special default Node that just
returns some "don't touch me" values.
Fixes PR9427
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127263 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp')
-rw-r--r-- | lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp b/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp index 20cbed7..42d096e 100644 --- a/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp +++ b/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp @@ -1785,7 +1785,7 @@ int RegReductionPQBase::RegPressureDiff(SUnit *SU, unsigned &LiveUses) const { } const SDNode *N = SU->getNode(); - if (!N->isMachineOpcode() || !SU->NumSuccs) + if (!N || !N->isMachineOpcode() || !SU->NumSuccs) return PDiff; unsigned NumDefs = TII->get(N->getMachineOpcode()).getNumDefs(); @@ -1804,6 +1804,9 @@ void RegReductionPQBase::ScheduledNode(SUnit *SU) { if (!TracksRegPressure) return; + if (!SU->getNode()) + return; + for (SUnit::pred_iterator I = SU->Preds.begin(), E = SU->Preds.end(); I != E; ++I) { if (I->isCtrl()) @@ -1870,6 +1873,8 @@ void RegReductionPQBase::UnscheduledNode(SUnit *SU) { return; const SDNode *N = SU->getNode(); + if (!N) return; + if (!N->isMachineOpcode()) { if (N->getOpcode() != ISD::CopyToReg) return; |