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authorJim Grosbach <grosbach@apple.com>2010-02-09 19:51:37 +0000
committerJim Grosbach <grosbach@apple.com>2010-02-09 19:51:37 +0000
commite560a78d3626c2accf49cf38f3c90c53d516b9a0 (patch)
treea72eba0c84465f316bd85bf77d7fb3e24dac5722 /lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
parenta7f368c57d03e2e7230d13551d6cbc9c7a3af0eb (diff)
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Radar 7417921
tMOVCCi pattern only valid for low registers, as the Thumb1 mov immediate to register instruction only works with low registers. Allowing high registers for the instruction resulted in the assembler choosing the wide (32-bit) encoding for the mov, but LLVM though the instruction was only 16 bits wide, so offset calculations for constant pools became incorrect, leading to out of range constant pool entries. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95686 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp')
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