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authorDan Gohman <gohman@apple.com>2008-10-03 17:56:45 +0000
committerDan Gohman <gohman@apple.com>2008-10-03 17:56:45 +0000
commit88566ae08a299f35b1131daf07811ee426d1ee44 (patch)
tree6f1b43daba422e617873e9b15f058c0a1406bb88 /lib/CodeGen/SelectionDAG/SelectionDAG.cpp
parentc515fa964c2e396c82e62f26a8a3c3229aba5495 (diff)
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Use -1ULL instead of uint64_t(-1), at Anton's suggestion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57021 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/SelectionDAG/SelectionDAG.cpp')
-rw-r--r--lib/CodeGen/SelectionDAG/SelectionDAG.cpp4
1 files changed, 2 insertions, 2 deletions
diff --git a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
index 4e8c47c..cacffe4 100644
--- a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+++ b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
@@ -2927,7 +2927,7 @@ static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG,
// Expand memcpy to a series of load and store ops if the size operand falls
// below a certain threshold.
std::vector<MVT> MemOps;
- uint64_t Limit = uint64_t(-1);
+ uint64_t Limit = -1ULL;
if (!AlwaysInline)
Limit = TLI.getMaxStoresPerMemcpy();
unsigned DstAlign = Align; // Destination alignment can change.
@@ -2985,7 +2985,7 @@ static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG,
// Expand memmove to a series of load and store ops if the size operand falls
// below a certain threshold.
std::vector<MVT> MemOps;
- uint64_t Limit = uint64_t(-1);
+ uint64_t Limit = -1ULL;
if (!AlwaysInline)
Limit = TLI.getMaxStoresPerMemmove();
unsigned DstAlign = Align; // Destination alignment can change.