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author | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2011-01-08 23:10:50 +0000 |
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committer | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2011-01-08 23:10:50 +0000 |
commit | 358de24dc121cd21911f3248b599178c86e9b467 (patch) | |
tree | fd538285703e4951a9ca065c65518e04e0185cf9 /lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | |
parent | 7c8818630991855830c94c79e1035222f3749689 (diff) | |
download | external_llvm-358de24dc121cd21911f3248b599178c86e9b467.zip external_llvm-358de24dc121cd21911f3248b599178c86e9b467.tar.gz external_llvm-358de24dc121cd21911f3248b599178c86e9b467.tar.bz2 |
Use an IndexedMap for LiveOutRegInfo to hide its dependence on TargetRegisterInfo::FirstVirtualRegister.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123096 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp')
-rw-r--r-- | lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | 9 |
1 files changed, 3 insertions, 6 deletions
diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp index 2869bd8..05acb03 100644 --- a/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp +++ b/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp @@ -44,7 +44,6 @@ #include "llvm/CodeGen/PseudoSourceValue.h" #include "llvm/CodeGen/SelectionDAG.h" #include "llvm/Analysis/DebugInfo.h" -#include "llvm/Target/TargetRegisterInfo.h" #include "llvm/Target/TargetData.h" #include "llvm/Target/TargetFrameInfo.h" #include "llvm/Target/TargetInstrInfo.h" @@ -642,14 +641,12 @@ SDValue RegsForValue::getCopyFromRegs(SelectionDAG &DAG, // If the source register was virtual and if we know something about it, // add an assert node. if (!TargetRegisterInfo::isVirtualRegister(Regs[Part+i]) || - !RegisterVT.isInteger() || RegisterVT.isVector()) + !RegisterVT.isInteger() || RegisterVT.isVector() || + !FuncInfo.LiveOutRegInfo.inBounds(Regs[Part+i])) continue; - unsigned SlotNo = Regs[Part+i]-TargetRegisterInfo::FirstVirtualRegister; - if (SlotNo >= FuncInfo.LiveOutRegInfo.size()) continue; - const FunctionLoweringInfo::LiveOutInfo &LOI = - FuncInfo.LiveOutRegInfo[SlotNo]; + FuncInfo.LiveOutRegInfo[Regs[Part+i]]; unsigned RegSize = RegisterVT.getSizeInBits(); unsigned NumSignBits = LOI.NumSignBits; |