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| author | Bill Wendling <isanbard@gmail.com> | 2009-04-29 23:29:43 +0000 |
|---|---|---|
| committer | Bill Wendling <isanbard@gmail.com> | 2009-04-29 23:29:43 +0000 |
| commit | 5ed22ac54c2530a1d0d140d259f881f3b2040e56 (patch) | |
| tree | 740060aedf3541a695c8ee54326cd88874936263 /lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp | |
| parent | f0d2d9593dbeca56c962391c18ddb059e2ee9bef (diff) | |
| download | external_llvm-5ed22ac54c2530a1d0d140d259f881f3b2040e56.zip external_llvm-5ed22ac54c2530a1d0d140d259f881f3b2040e56.tar.gz external_llvm-5ed22ac54c2530a1d0d140d259f881f3b2040e56.tar.bz2 | |
Instead of passing in an unsigned value for the optimization level, use an enum,
which better identifies what the optimization is doing. And is more flexible for
future uses.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70440 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp')
| -rw-r--r-- | lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp index 37087ec..4c934cd 100644 --- a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp +++ b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp @@ -136,10 +136,10 @@ namespace llvm { /// createDefaultScheduler - This creates an instruction scheduler appropriate /// for the target. ScheduleDAGSDNodes* createDefaultScheduler(SelectionDAGISel *IS, - unsigned OptLevel) { + CodeGenOpt::Level OptLevel) { const TargetLowering &TLI = IS->getTargetLowering(); - if (OptLevel == 0) + if (OptLevel == CodeGenOpt::None) return createFastDAGScheduler(IS, OptLevel); if (TLI.getSchedulingPreference() == TargetLowering::SchedulingForLatency) return createTDListDAGScheduler(IS, OptLevel); @@ -262,7 +262,7 @@ static void EmitLiveInCopies(MachineBasicBlock *EntryMBB, // SelectionDAGISel code //===----------------------------------------------------------------------===// -SelectionDAGISel::SelectionDAGISel(TargetMachine &tm, unsigned OL) : +SelectionDAGISel::SelectionDAGISel(TargetMachine &tm, CodeGenOpt::Level OL) : FunctionPass(&ID), TM(tm), TLI(*tm.getTargetLowering()), FuncInfo(new FunctionLoweringInfo(TLI)), CurDAG(new SelectionDAG(TLI, *FuncInfo)), @@ -645,7 +645,7 @@ void SelectionDAGISel::CodeGenAndEmitDAG() { if (ViewISelDAGs) CurDAG->viewGraph("isel input for " + BlockName); - if (OptLevel != 0) + if (OptLevel != CodeGenOpt::None) ComputeLiveOutVRegInfo(); // Third, instruction select all of the operations to machine code, adding the |