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author | Dan Gohman <gohman@apple.com> | 2010-07-23 18:03:30 +0000 |
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committer | Dan Gohman <gohman@apple.com> | 2010-07-23 18:03:30 +0000 |
commit | a4f4d699ec627e798357929295aecd3d55b8d703 (patch) | |
tree | 944ff423164cbdafb494cff07b41174d461f2da3 /lib/CodeGen/SelectionDAG/TargetLowering.cpp | |
parent | 7c98283f0ef74a5663c4c4a0938a344b204336fd (diff) | |
download | external_llvm-a4f4d699ec627e798357929295aecd3d55b8d703.zip external_llvm-a4f4d699ec627e798357929295aecd3d55b8d703.tar.gz external_llvm-a4f4d699ec627e798357929295aecd3d55b8d703.tar.bz2 |
DAGCombine (shl (anyext x, c)) to (anyext (shl x, c)) if the high bits
are not demanded. This often allows the anyext to be folded away.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109242 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/SelectionDAG/TargetLowering.cpp')
-rw-r--r-- | lib/CodeGen/SelectionDAG/TargetLowering.cpp | 22 |
1 files changed, 21 insertions, 1 deletions
diff --git a/lib/CodeGen/SelectionDAG/TargetLowering.cpp b/lib/CodeGen/SelectionDAG/TargetLowering.cpp index 6e6fede..389f2ea 100644 --- a/lib/CodeGen/SelectionDAG/TargetLowering.cpp +++ b/lib/CodeGen/SelectionDAG/TargetLowering.cpp @@ -1367,9 +1367,29 @@ bool TargetLowering::SimplifyDemandedBits(SDValue Op, } } - if (SimplifyDemandedBits(Op.getOperand(0), NewMask.lshr(ShAmt), + if (SimplifyDemandedBits(InOp, NewMask.lshr(ShAmt), KnownZero, KnownOne, TLO, Depth+1)) return true; + + // Convert (shl (anyext x, c)) to (anyext (shl x, c)) if the high bits + // are not demanded. This will likely allow the anyext to be folded away. + if (InOp.getNode()->getOpcode() == ISD::ANY_EXTEND) { + SDValue InnerOp = InOp.getNode()->getOperand(0); + EVT InnerVT = InnerOp.getValueType(); + if ((APInt::getHighBitsSet(BitWidth, + BitWidth - InnerVT.getSizeInBits()) & + DemandedMask) == 0 && + isTypeDesirableForOp(ISD::SHL, InnerVT)) { + SDValue NarrowShl = + TLO.DAG.getNode(ISD::SHL, dl, InnerVT, InnerOp, + TLO.DAG.getConstant(ShAmt, InnerVT)); + return + TLO.CombineTo(Op, + TLO.DAG.getNode(ISD::ANY_EXTEND, dl, Op.getValueType(), + NarrowShl)); + } + } + KnownZero <<= SA->getZExtValue(); KnownOne <<= SA->getZExtValue(); // low bits known zero. |