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author | Chris Lattner <sabre@nondot.org> | 2009-03-17 19:36:00 +0000 |
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committer | Chris Lattner <sabre@nondot.org> | 2009-03-17 19:36:00 +0000 |
commit | 0b18e59336dcb18e036540dd667fed8d17c3cc09 (patch) | |
tree | 5e6e5d3e783ba75a8e4fae7565ea30cc7655c2d1 /lib/CodeGen/SelectionDAG | |
parent | 46d232d4bc198ce4a347e74f331a99142a02276d (diff) | |
download | external_llvm-0b18e59336dcb18e036540dd667fed8d17c3cc09.zip external_llvm-0b18e59336dcb18e036540dd667fed8d17c3cc09.tar.gz external_llvm-0b18e59336dcb18e036540dd667fed8d17c3cc09.tar.bz2 |
Fix codegen to compute the size of an allocation by multiplying the
size by the array amount as an i32 value instead of promoting from
i32 to i64 then doing the multiply. Not doing this broke wrap-around
assumptions that the optimizers (validly) made. The ultimate real
fix for this is to introduce i64 version of alloca and remove mallocinst.
This fixes PR3829
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67093 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/SelectionDAG')
-rw-r--r-- | lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp | 25 |
1 files changed, 17 insertions, 8 deletions
diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp index 0dbc35b..855f9a4 100644 --- a/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp +++ b/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp @@ -2763,6 +2763,13 @@ void SelectionDAGLowering::visitAlloca(AllocaInst &I) { I.getAlignment()); SDValue AllocSize = getValue(I.getArraySize()); + + AllocSize = DAG.getNode(ISD::MUL, getCurDebugLoc(), AllocSize.getValueType(), + AllocSize, + DAG.getConstant(TySize, AllocSize.getValueType())); + + + MVT IntPtr = TLI.getPointerTy(); if (IntPtr.bitsLT(AllocSize.getValueType())) AllocSize = DAG.getNode(ISD::TRUNCATE, getCurDebugLoc(), @@ -2771,9 +2778,6 @@ void SelectionDAGLowering::visitAlloca(AllocaInst &I) { AllocSize = DAG.getNode(ISD::ZERO_EXTEND, getCurDebugLoc(), IntPtr, AllocSize); - AllocSize = DAG.getNode(ISD::MUL, getCurDebugLoc(), IntPtr, AllocSize, - DAG.getIntPtrConstant(TySize)); - // Handle alignment. If the requested alignment is less than or equal to // the stack alignment, ignore it. If the size is greater than or equal to // the stack alignment, we note this in the DYNAMIC_STACKALLOC node. @@ -5425,6 +5429,16 @@ void SelectionDAGLowering::visitInlineAsm(CallSite CS) { void SelectionDAGLowering::visitMalloc(MallocInst &I) { SDValue Src = getValue(I.getOperand(0)); + // Scale up by the type size in the original i32 type width. Various + // mid-level optimizers may make assumptions about demanded bits etc from the + // i32-ness of the optimizer: we do not want to promote to i64 and then + // multiply on 64-bit targets. + // FIXME: Malloc inst should go away: PR715. + uint64_t ElementSize = TD->getTypePaddedSize(I.getType()->getElementType()); + if (ElementSize != 1) + Src = DAG.getNode(ISD::MUL, getCurDebugLoc(), Src.getValueType(), + Src, DAG.getConstant(ElementSize, Src.getValueType())); + MVT IntPtr = TLI.getPointerTy(); if (IntPtr.bitsLT(Src.getValueType())) @@ -5432,11 +5446,6 @@ void SelectionDAGLowering::visitMalloc(MallocInst &I) { else if (IntPtr.bitsGT(Src.getValueType())) Src = DAG.getNode(ISD::ZERO_EXTEND, getCurDebugLoc(), IntPtr, Src); - // Scale the source by the type size. - uint64_t ElementSize = TD->getTypePaddedSize(I.getType()->getElementType()); - Src = DAG.getNode(ISD::MUL, getCurDebugLoc(), Src.getValueType(), - Src, DAG.getIntPtrConstant(ElementSize)); - TargetLowering::ArgListTy Args; TargetLowering::ArgListEntry Entry; Entry.Node = Src; |