aboutsummaryrefslogtreecommitdiffstats
path: root/lib/CodeGen/SelectionDAG
diff options
context:
space:
mode:
authorEvan Cheng <evan.cheng@apple.com>2010-09-23 06:51:55 +0000
committerEvan Cheng <evan.cheng@apple.com>2010-09-23 06:51:55 +0000
commit266a99d161069071f32c7c09dded481fd573a82e (patch)
tree5089759a8aa897fa4b5aa307a22170d7a54603a2 /lib/CodeGen/SelectionDAG
parentf70e7cc7a2871d498dbecbec2d1c3beb3da2af33 (diff)
downloadexternal_llvm-266a99d161069071f32c7c09dded481fd573a82e.zip
external_llvm-266a99d161069071f32c7c09dded481fd573a82e.tar.gz
external_llvm-266a99d161069071f32c7c09dded481fd573a82e.tar.bz2
SDISel should not optimize a unconditional branch following a conditional branch
when the unconditional branch destination is the fallthrough block. The canonicalization makes it easier to allow optimizations on DAGs to invert conditional branches. The branch folding pass (and AnalyzeBranch) will clean up the unnecessary unconditional branches later. This is one of the patches leading up to disabling codegen prepare critical edge splitting. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114630 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/SelectionDAG')
-rw-r--r--lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp9
1 files changed, 5 insertions, 4 deletions
diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
index 04ac24e..f3bc50d 100644
--- a/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
+++ b/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
@@ -1503,10 +1503,11 @@ void SelectionDAGBuilder::visitSwitchCase(CaseBlock &CB,
MVT::Other, getControlRoot(), Cond,
DAG.getBasicBlock(CB.TrueBB));
- // Insert the false branch.
- if (CB.FalseBB != NextBlock)
- BrCond = DAG.getNode(ISD::BR, dl, MVT::Other, BrCond,
- DAG.getBasicBlock(CB.FalseBB));
+ // Insert the false branch. Do this even if it's a fall through branch,
+ // this makes it easier to do DAG optimizations which require inverting
+ // the branch condition.
+ BrCond = DAG.getNode(ISD::BR, dl, MVT::Other, BrCond,
+ DAG.getBasicBlock(CB.FalseBB));
DAG.setRoot(BrCond);
}