Rename many of the Tmp1, Tmp2, Tmp3 variables to names such as Chain, Value, Ptr, etc.

No functionality change.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160042 91177308-0d34-0410-b5e6-96231b3b80d8

1 files changed, 104 insertions, 100 deletions

diff --git a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
index 8a5d294..b0776af 100644
--- a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
+++ b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
@@ -642,9 +642,8 @@ SDValue SelectionDAGLegalize::OptimizeFloatStore(StoreSDNode* ST) {
   // probably means that we need to integrate dag combiner and legalizer
   // together.
   // We generally can't do this one for long doubles.
-  SDValue Tmp1 = ST->getChain();
-  SDValue Tmp2 = ST->getBasePtr();
-  SDValue Tmp3;
+  SDValue Chain = ST->getChain();
+  SDValue Ptr = ST->getBasePtr();
   unsigned Alignment = ST->getAlignment();
   bool isVolatile = ST->isVolatile();
   bool isNonTemporal = ST->isNonTemporal();
@@ -652,19 +651,19 @@ SDValue SelectionDAGLegalize::OptimizeFloatStore(StoreSDNode* ST) {
   if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(ST->getValue())) {
     if (CFP->getValueType(0) == MVT::f32 &&
         TLI.isTypeLegal(MVT::i32)) {
-      Tmp3 = DAG.getConstant(CFP->getValueAPF().
+      SDValue Con = DAG.getConstant(CFP->getValueAPF().
                                       bitcastToAPInt().zextOrTrunc(32),
                               MVT::i32);
-      return DAG.getStore(Tmp1, dl, Tmp3, Tmp2, ST->getPointerInfo(),
+      return DAG.getStore(Chain, dl, Con, Ptr, ST->getPointerInfo(),
                           isVolatile, isNonTemporal, Alignment);
     }
 
     if (CFP->getValueType(0) == MVT::f64) {
       // If this target supports 64-bit registers, do a single 64-bit store.
       if (TLI.isTypeLegal(MVT::i64)) {
-        Tmp3 = DAG.getConstant(CFP->getValueAPF().bitcastToAPInt().
+        SDValue Con = DAG.getConstant(CFP->getValueAPF().bitcastToAPInt().
                                   zextOrTrunc(64), MVT::i64);
-        return DAG.getStore(Tmp1, dl, Tmp3, Tmp2, ST->getPointerInfo(),
+        return DAG.getStore(Chain, dl, Con, Ptr, ST->getPointerInfo(),
                             isVolatile, isNonTemporal, Alignment);
       }
 
@@ -677,11 +676,11 @@ SDValue SelectionDAGLegalize::OptimizeFloatStore(StoreSDNode* ST) {
         SDValue Hi = DAG.getConstant(IntVal.lshr(32).trunc(32), MVT::i32);
         if (TLI.isBigEndian()) std::swap(Lo, Hi);
 
-        Lo = DAG.getStore(Tmp1, dl, Lo, Tmp2, ST->getPointerInfo(), isVolatile,
+        Lo = DAG.getStore(Chain, dl, Lo, Ptr, ST->getPointerInfo(), isVolatile,
                           isNonTemporal, Alignment);
-        Tmp2 = DAG.getNode(ISD::ADD, dl, Tmp2.getValueType(), Tmp2,
+        Ptr = DAG.getNode(ISD::ADD, dl, Ptr.getValueType(), Ptr,
                             DAG.getIntPtrConstant(4));
-        Hi = DAG.getStore(Tmp1, dl, Hi, Tmp2,
+        Hi = DAG.getStore(Chain, dl, Hi, Ptr,
                           ST->getPointerInfo().getWithOffset(4),
                           isVolatile, isNonTemporal, MinAlign(Alignment, 4U));
 
@@ -694,8 +693,8 @@ SDValue SelectionDAGLegalize::OptimizeFloatStore(StoreSDNode* ST) {
 
 void SelectionDAGLegalize::LegalizeStoreOps(SDNode *Node) {
     StoreSDNode *ST = cast<StoreSDNode>(Node);
-    SDValue Tmp1 = ST->getChain();
-    SDValue Tmp2 = ST->getBasePtr();
+    SDValue Chain = ST->getChain();
+    SDValue Ptr = ST->getBasePtr();
     DebugLoc dl = Node->getDebugLoc();
 
     unsigned Alignment = ST->getAlignment();
@@ -709,8 +708,8 @@ void SelectionDAGLegalize::LegalizeStoreOps(SDNode *Node) {
       }
 
       {
-        SDValue Tmp3 = ST->getValue();
-        EVT VT = Tmp3.getValueType();
+        SDValue Value = ST->getValue();
+        EVT VT = Value.getValueType();
         switch (TLI.getOperationAction(ISD::STORE, VT)) {
         default: llvm_unreachable("This action is not supported yet!");
         case TargetLowering::Legal:
@@ -724,17 +723,18 @@ void SelectionDAGLegalize::LegalizeStoreOps(SDNode *Node) {
                                    DAG, TLI, this);
           }
           break;
-        case TargetLowering::Custom:
-          Tmp1 = TLI.LowerOperation(SDValue(Node, 0), DAG);
-          if (Tmp1.getNode())
-            ReplaceNode(SDValue(Node, 0), Tmp1);
-          break;
+        case TargetLowering::Custom: {
+          SDValue Res = TLI.LowerOperation(SDValue(Node, 0), DAG);
+          if (Res.getNode())
+            ReplaceNode(SDValue(Node, 0), Res);
+          return;
+        }
         case TargetLowering::Promote: {
           assert(VT.isVector() && "Unknown legal promote case!");
-          Tmp3 = DAG.getNode(ISD::BITCAST, dl,
-                             TLI.getTypeToPromoteTo(ISD::STORE, VT), Tmp3);
+          Value = DAG.getNode(ISD::BITCAST, dl,
+                             TLI.getTypeToPromoteTo(ISD::STORE, VT), Value);
           SDValue Result =
-            DAG.getStore(Tmp1, dl, Tmp3, Tmp2,
+            DAG.getStore(Chain, dl, Value, Ptr,
                          ST->getPointerInfo(), isVolatile,
                          isNonTemporal, Alignment);
           ReplaceNode(SDValue(Node, 0), Result);
@@ -744,7 +744,7 @@ void SelectionDAGLegalize::LegalizeStoreOps(SDNode *Node) {
         return;
       }
     } else {
-      SDValue Tmp3 = ST->getValue();
+      SDValue Value = ST->getValue();
 
       EVT StVT = ST->getMemoryVT();
       unsigned StWidth = StVT.getSizeInBits();
@@ -755,9 +755,9 @@ void SelectionDAGLegalize::LegalizeStoreOps(SDNode *Node) {
         // TRUNCSTORE:i1 X -> TRUNCSTORE:i8 (and X, 1)
         EVT NVT = EVT::getIntegerVT(*DAG.getContext(),
                                     StVT.getStoreSizeInBits());
-        Tmp3 = DAG.getZeroExtendInReg(Tmp3, dl, StVT);
+        Value = DAG.getZeroExtendInReg(Value, dl, StVT);
         SDValue Result =
-          DAG.getTruncStore(Tmp1, dl, Tmp3, Tmp2, ST->getPointerInfo(),
+          DAG.getTruncStore(Chain, dl, Value, Ptr, ST->getPointerInfo(),
                             NVT, isVolatile, isNonTemporal, Alignment);
         ReplaceNode(SDValue(Node, 0), Result);
       } else if (StWidth & (StWidth - 1)) {
@@ -777,18 +777,18 @@ void SelectionDAGLegalize::LegalizeStoreOps(SDNode *Node) {
         if (TLI.isLittleEndian()) {
           // TRUNCSTORE:i24 X -> TRUNCSTORE:i16 X, TRUNCSTORE@+2:i8 (srl X, 16)
           // Store the bottom RoundWidth bits.
-          Lo = DAG.getTruncStore(Tmp1, dl, Tmp3, Tmp2, ST->getPointerInfo(),
+          Lo = DAG.getTruncStore(Chain, dl, Value, Ptr, ST->getPointerInfo(),
                                  RoundVT,
                                  isVolatile, isNonTemporal, Alignment);
 
           // Store the remaining ExtraWidth bits.
           IncrementSize = RoundWidth / 8;
-          Tmp2 = DAG.getNode(ISD::ADD, dl, Tmp2.getValueType(), Tmp2,
+          Ptr = DAG.getNode(ISD::ADD, dl, Ptr.getValueType(), Ptr,
                              DAG.getIntPtrConstant(IncrementSize));
-          Hi = DAG.getNode(ISD::SRL, dl, Tmp3.getValueType(), Tmp3,
+          Hi = DAG.getNode(ISD::SRL, dl, Value.getValueType(), Value,
                            DAG.getConstant(RoundWidth,
-                                    TLI.getShiftAmountTy(Tmp3.getValueType())));
-          Hi = DAG.getTruncStore(Tmp1, dl, Hi, Tmp2,
+                                    TLI.getShiftAmountTy(Value.getValueType())));
+          Hi = DAG.getTruncStore(Chain, dl, Hi, Ptr,
                              ST->getPointerInfo().getWithOffset(IncrementSize),
                                  ExtraVT, isVolatile, isNonTemporal,
                                  MinAlign(Alignment, IncrementSize));
@@ -796,17 +796,17 @@ void SelectionDAGLegalize::LegalizeStoreOps(SDNode *Node) {
           // Big endian - avoid unaligned stores.
           // TRUNCSTORE:i24 X -> TRUNCSTORE:i16 (srl X, 8), TRUNCSTORE@+2:i8 X
           // Store the top RoundWidth bits.
-          Hi = DAG.getNode(ISD::SRL, dl, Tmp3.getValueType(), Tmp3,
+          Hi = DAG.getNode(ISD::SRL, dl, Value.getValueType(), Value,
                            DAG.getConstant(ExtraWidth,
-                                    TLI.getShiftAmountTy(Tmp3.getValueType())));
-          Hi = DAG.getTruncStore(Tmp1, dl, Hi, Tmp2, ST->getPointerInfo(),
+                                    TLI.getShiftAmountTy(Value.getValueType())));
+          Hi = DAG.getTruncStore(Chain, dl, Hi, Ptr, ST->getPointerInfo(),
                                  RoundVT, isVolatile, isNonTemporal, Alignment);
 
           // Store the remaining ExtraWidth bits.
           IncrementSize = RoundWidth / 8;
-          Tmp2 = DAG.getNode(ISD::ADD, dl, Tmp2.getValueType(), Tmp2,
+          Ptr = DAG.getNode(ISD::ADD, dl, Ptr.getValueType(), Ptr,
                              DAG.getIntPtrConstant(IncrementSize));
-          Lo = DAG.getTruncStore(Tmp1, dl, Tmp3, Tmp2,
+          Lo = DAG.getTruncStore(Chain, dl, Value, Ptr,
                               ST->getPointerInfo().getWithOffset(IncrementSize),
                                  ExtraVT, isVolatile, isNonTemporal,
                                  MinAlign(Alignment, IncrementSize));
@@ -828,20 +828,22 @@ void SelectionDAGLegalize::LegalizeStoreOps(SDNode *Node) {
               ExpandUnalignedStore(cast<StoreSDNode>(Node), DAG, TLI, this);
           }
           break;
-        case TargetLowering::Custom:
-          Tmp1 = TLI.LowerOperation(SDValue(Node, 0), DAG);
-          if (Tmp1.getNode())
-            ReplaceNode(SDValue(Node, 0), Tmp1);
-          break;
+        case TargetLowering::Custom: {
+          SDValue Res = TLI.LowerOperation(SDValue(Node, 0), DAG);
+          if (Res.getNode())
+            ReplaceNode(SDValue(Node, 0), Res);
+          return;
+        }
         case TargetLowering::Expand:
           assert(!StVT.isVector() &&
                  "Vector Stores are handled in LegalizeVectorOps");
 
           // TRUNCSTORE:i16 i32 -> STORE i16
-          assert(TLI.isTypeLegal(StVT) && "Do not know how to expand this store!");
-          Tmp3 = DAG.getNode(ISD::TRUNCATE, dl, StVT, Tmp3);
+          assert(TLI.isTypeLegal(StVT) &&
+                 "Do not know how to expand this store!");
+          Value = DAG.getNode(ISD::TRUNCATE, dl, StVT, Value);
           SDValue Result =
-            DAG.getStore(Tmp1, dl, Tmp3, Tmp2, ST->getPointerInfo(),
+            DAG.getStore(Chain, dl, Value, Ptr, ST->getPointerInfo(),
                          isVolatile, isNonTemporal, Alignment);
           ReplaceNode(SDValue(Node, 0), Result);
           break;
@@ -852,15 +854,16 @@ void SelectionDAGLegalize::LegalizeStoreOps(SDNode *Node) {
 
 void SelectionDAGLegalize::LegalizeLoadOps(SDNode *Node) {
   LoadSDNode *LD = cast<LoadSDNode>(Node);
-  SDValue Tmp1 = LD->getChain();   // Legalize the chain.
-  SDValue Tmp2 = LD->getBasePtr(); // Legalize the base pointer.
+  SDValue Chain = LD->getChain();  // The chain.
+  SDValue Ptr = LD->getBasePtr();  // The base pointer.
+  SDValue Value;                   // The value returned by the load op.
   DebugLoc dl = Node->getDebugLoc();
 
   ISD::LoadExtType ExtType = LD->getExtensionType();
   if (ExtType == ISD::NON_EXTLOAD) {
     EVT VT = Node->getValueType(0);
-    SDValue Tmp3 = SDValue(Node, 0);
-    SDValue Tmp4 = SDValue(Node, 1);
+    SDValue RVal = SDValue(Node, 0);
+    SDValue RChain = SDValue(Node, 1);
 
     switch (TLI.getOperationAction(Node->getOpcode(), VT)) {
     default: llvm_unreachable("This action is not supported yet!");
@@ -869,38 +872,40 @@ void SelectionDAGLegalize::LegalizeLoadOps(SDNode *Node) {
              // expand it.
              if (!TLI.allowsUnalignedMemoryAccesses(LD->getMemoryVT())) {
                Type *Ty = LD->getMemoryVT().getTypeForEVT(*DAG.getContext());
-               unsigned ABIAlignment = TLI.getTargetData()->getABITypeAlignment(Ty);
+               unsigned ABIAlignment =
+                 TLI.getTargetData()->getABITypeAlignment(Ty);
                if (LD->getAlignment() < ABIAlignment){
                  ExpandUnalignedLoad(cast<LoadSDNode>(Node),
-                                     DAG, TLI, Tmp3, Tmp4);
+                                     DAG, TLI, RVal, RChain);
                }
              }
              break;
-    case TargetLowering::Custom:
-             Tmp1 = TLI.LowerOperation(Tmp3, DAG);
-             if (Tmp1.getNode()) {
-               Tmp3 = Tmp1;
-               Tmp4 = Tmp1.getValue(1);
+    case TargetLowering::Custom: {
+             SDValue Res = TLI.LowerOperation(RVal, DAG);
+             if (Res.getNode()) {
+               RVal = Res;
+               RChain = Res.getValue(1);
              }
              break;
+    }
     case TargetLowering::Promote: {
       // Only promote a load of vector type to another.
       assert(VT.isVector() && "Cannot promote this load!");
       // Change base type to a different vector type.
       EVT NVT = TLI.getTypeToPromoteTo(Node->getOpcode(), VT);
 
-      Tmp1 = DAG.getLoad(NVT, dl, Tmp1, Tmp2, LD->getPointerInfo(),
+      SDValue Res = DAG.getLoad(NVT, dl, Chain, Ptr, LD->getPointerInfo(),
                          LD->isVolatile(), LD->isNonTemporal(),
                          LD->isInvariant(), LD->getAlignment());
-      Tmp3 = DAG.getNode(ISD::BITCAST, dl, VT, Tmp1);
-      Tmp4 = Tmp1.getValue(1);
+      RVal = DAG.getNode(ISD::BITCAST, dl, VT, Res);
+      RChain = Res.getValue(1);
       break;
     }
     }
-    if (Tmp4.getNode() != Node) {
-      assert(Tmp3.getNode() != Node && "Load must be completely replaced");
-      DAG.ReplaceAllUsesOfValueWith(SDValue(Node, 0), Tmp3);
-      DAG.ReplaceAllUsesOfValueWith(SDValue(Node, 1), Tmp4);
+    if (RChain.getNode() != Node) {
+      assert(RVal.getNode() != Node && "Load must be completely replaced");
+      DAG.ReplaceAllUsesOfValueWith(SDValue(Node, 0), RVal);
+      DAG.ReplaceAllUsesOfValueWith(SDValue(Node, 1), RChain);
       ReplacedNode(Node);
     }
     return;
@@ -936,7 +941,7 @@ void SelectionDAGLegalize::LegalizeLoadOps(SDNode *Node) {
 
     SDValue Result =
       DAG.getExtLoad(NewExtType, dl, Node->getValueType(0),
-                     Tmp1, Tmp2, LD->getPointerInfo(),
+                     Chain, Ptr, LD->getPointerInfo(),
                      NVT, isVolatile, isNonTemporal, Alignment);
 
     Ch = Result.getValue(1); // The chain.
@@ -952,8 +957,8 @@ void SelectionDAGLegalize::LegalizeLoadOps(SDNode *Node) {
                            Result.getValueType(), Result,
                            DAG.getValueType(SrcVT));
 
-    Tmp1 = Result;
-    Tmp2 = Ch;
+    Value = Result;
+    Chain = Ch;
   } else if (SrcWidth & (SrcWidth - 1)) {
     // If not loading a power-of-2 number of bits, expand as two loads.
     assert(!SrcVT.isVector() && "Unsupported extload!");
@@ -972,15 +977,15 @@ void SelectionDAGLegalize::LegalizeLoadOps(SDNode *Node) {
       // EXTLOAD:i24 -> ZEXTLOAD:i16 | (shl EXTLOAD@+2:i8, 16)
       // Load the bottom RoundWidth bits.
       Lo = DAG.getExtLoad(ISD::ZEXTLOAD, dl, Node->getValueType(0),
-                          Tmp1, Tmp2,
+                          Chain, Ptr,
                           LD->getPointerInfo(), RoundVT, isVolatile,
                           isNonTemporal, Alignment);
 
       // Load the remaining ExtraWidth bits.
       IncrementSize = RoundWidth / 8;
-      Tmp2 = DAG.getNode(ISD::ADD, dl, Tmp2.getValueType(), Tmp2,
+      Ptr = DAG.getNode(ISD::ADD, dl, Ptr.getValueType(), Ptr,
                          DAG.getIntPtrConstant(IncrementSize));
-      Hi = DAG.getExtLoad(ExtType, dl, Node->getValueType(0), Tmp1, Tmp2,
+      Hi = DAG.getExtLoad(ExtType, dl, Node->getValueType(0), Chain, Ptr,
                           LD->getPointerInfo().getWithOffset(IncrementSize),
                           ExtraVT, isVolatile, isNonTemporal,
                           MinAlign(Alignment, IncrementSize));
@@ -996,21 +1001,21 @@ void SelectionDAGLegalize::LegalizeLoadOps(SDNode *Node) {
                                        TLI.getShiftAmountTy(Hi.getValueType())));
 
       // Join the hi and lo parts.
-      Tmp1 = DAG.getNode(ISD::OR, dl, Node->getValueType(0), Lo, Hi);
+      Value = DAG.getNode(ISD::OR, dl, Node->getValueType(0), Lo, Hi);
     } else {
       // Big endian - avoid unaligned loads.
       // EXTLOAD:i24 -> (shl EXTLOAD:i16, 8) | ZEXTLOAD@+2:i8
       // Load the top RoundWidth bits.
-      Hi = DAG.getExtLoad(ExtType, dl, Node->getValueType(0), Tmp1, Tmp2,
+      Hi = DAG.getExtLoad(ExtType, dl, Node->getValueType(0), Chain, Ptr,
                           LD->getPointerInfo(), RoundVT, isVolatile,
                           isNonTemporal, Alignment);
 
       // Load the remaining ExtraWidth bits.
       IncrementSize = RoundWidth / 8;
-      Tmp2 = DAG.getNode(ISD::ADD, dl, Tmp2.getValueType(), Tmp2,
+      Ptr = DAG.getNode(ISD::ADD, dl, Ptr.getValueType(), Ptr,
                          DAG.getIntPtrConstant(IncrementSize));
       Lo = DAG.getExtLoad(ISD::ZEXTLOAD,
-                          dl, Node->getValueType(0), Tmp1, Tmp2,
+                          dl, Node->getValueType(0), Chain, Ptr,
                           LD->getPointerInfo().getWithOffset(IncrementSize),
                           ExtraVT, isVolatile, isNonTemporal,
                           MinAlign(Alignment, IncrementSize));
@@ -1026,10 +1031,10 @@ void SelectionDAGLegalize::LegalizeLoadOps(SDNode *Node) {
                                        TLI.getShiftAmountTy(Hi.getValueType())));
 
       // Join the hi and lo parts.
-      Tmp1 = DAG.getNode(ISD::OR, dl, Node->getValueType(0), Lo, Hi);
+      Value = DAG.getNode(ISD::OR, dl, Node->getValueType(0), Lo, Hi);
     }
 
-    Tmp2 = Ch;
+    Chain = Ch;
   } else {
     bool isCustom = false;
     switch (TLI.getLoadExtAction(ExtType, SrcVT)) {
@@ -1037,15 +1042,15 @@ void SelectionDAGLegalize::LegalizeLoadOps(SDNode *Node) {
     case TargetLowering::Custom:
              isCustom = true;
              // FALLTHROUGH
-    case TargetLowering::Legal:
-             Tmp1 = SDValue(Node, 0);
-             Tmp2 = SDValue(Node, 1);
+    case TargetLowering::Legal: {
+             Value = SDValue(Node, 0);
+             Chain = SDValue(Node, 1);
 
              if (isCustom) {
-               SDValue Tmp3 = TLI.LowerOperation(SDValue(Node, 0), DAG);
-               if (Tmp3.getNode()) {
-                 Tmp1 = Tmp3;
-                 Tmp2 = Tmp3.getValue(1);
+               SDValue Res = TLI.LowerOperation(SDValue(Node, 0), DAG);
+               if (Res.getNode()) {
+                 Value = Res;
+                 Chain = Res.getValue(1);
                }
              } else {
                // If this is an unaligned load and the target doesn't support it,
@@ -1057,14 +1062,15 @@ void SelectionDAGLegalize::LegalizeLoadOps(SDNode *Node) {
                    TLI.getTargetData()->getABITypeAlignment(Ty);
                  if (LD->getAlignment() < ABIAlignment){
                    ExpandUnalignedLoad(cast<LoadSDNode>(Node),
-                                       DAG, TLI, Tmp1, Tmp2);
+                                       DAG, TLI, Value, Chain);
                  }
                }
              }
              break;
+    }
     case TargetLowering::Expand:
              if (!TLI.isLoadExtLegal(ISD::EXTLOAD, SrcVT) && TLI.isTypeLegal(SrcVT)) {
-               SDValue Load = DAG.getLoad(SrcVT, dl, Tmp1, Tmp2,
+               SDValue Load = DAG.getLoad(SrcVT, dl, Chain, Ptr,
                                           LD->getPointerInfo(),
                                           LD->isVolatile(), LD->isNonTemporal(),
                                           LD->isInvariant(), LD->getAlignment());
@@ -1078,8 +1084,8 @@ void SelectionDAGLegalize::LegalizeLoadOps(SDNode *Node) {
                case ISD::ZEXTLOAD: ExtendOp = ISD::ZERO_EXTEND; break;
                default: llvm_unreachable("Unexpected extend load type!");
                }
-               Tmp1 = DAG.getNode(ExtendOp, dl, Node->getValueType(0), Load);
-               Tmp2 = Load.getValue(1);
+               Value = DAG.getNode(ExtendOp, dl, Node->getValueType(0), Load);
+               Chain = Load.getValue(1);
                break;
              }
 
@@ -1095,7 +1101,7 @@ void SelectionDAGLegalize::LegalizeLoadOps(SDNode *Node) {
              // Turn the unsupported load into an EXTLOAD followed by an explicit
              // zero/sign extend inreg.
              SDValue Result = DAG.getExtLoad(ISD::EXTLOAD, dl, Node->getValueType(0),
-                                             Tmp1, Tmp2, LD->getPointerInfo(), SrcVT,
+                                             Chain, Ptr, LD->getPointerInfo(), SrcVT,
                                              LD->isVolatile(), LD->isNonTemporal(),
                                              LD->getAlignment());
              SDValue ValRes;
@@ -1105,18 +1111,18 @@ void SelectionDAGLegalize::LegalizeLoadOps(SDNode *Node) {
                                     Result, DAG.getValueType(SrcVT));
              else
                ValRes = DAG.getZeroExtendInReg(Result, dl, SrcVT.getScalarType());
-             Tmp1 = ValRes;
-             Tmp2 = Result.getValue(1);
+             Value = ValRes;
+             Chain = Result.getValue(1);
              break;
     }
   }
 
   // Since loads produce two values, make sure to remember that we legalized
   // both of them.
-  if (Tmp2.getNode() != Node) {
-    assert(Tmp1.getNode() != Node && "Load must be completely replaced");
-    DAG.ReplaceAllUsesOfValueWith(SDValue(Node, 0), Tmp1);
-    DAG.ReplaceAllUsesOfValueWith(SDValue(Node, 1), Tmp2);
+  if (Chain.getNode() != Node) {
+    assert(Value.getNode() != Node && "Load must be completely replaced");
+    DAG.ReplaceAllUsesOfValueWith(SDValue(Node, 0), Value);
+    DAG.ReplaceAllUsesOfValueWith(SDValue(Node, 1), Chain);
     ReplacedNode(Node);
   }
 }
@@ -1139,8 +1145,6 @@ void SelectionDAGLegalize::LegalizeOp(SDNode *Node) {
             Node->getOperand(i).getOpcode() == ISD::TargetConstant) &&
            "Unexpected illegal type!");
 
-  SDValue Tmp1, Tmp2, Tmp3, Tmp4;
-
   // Figure out the correct action; the way to query this varies by opcode
   TargetLowering::LegalizeAction Action = TargetLowering::Legal;
   bool SimpleFinishLegalizing = true;
@@ -1294,19 +1298,19 @@ void SelectionDAGLegalize::LegalizeOp(SDNode *Node) {
     switch (Action) {
     case TargetLowering::Legal:
       return;
-    case TargetLowering::Custom:
+    case TargetLowering::Custom: {
       // FIXME: The handling for custom lowering with multiple results is
       // a complete mess.
-      Tmp1 = TLI.LowerOperation(SDValue(Node, 0), DAG);
-      if (Tmp1.getNode()) {
+      SDValue Res = TLI.LowerOperation(SDValue(Node, 0), DAG);
+      if (Res.getNode()) {
         SmallVector<SDValue, 8> ResultVals;
         for (unsigned i = 0, e = Node->getNumValues(); i != e; ++i) {
           if (e == 1)
-            ResultVals.push_back(Tmp1);
+            ResultVals.push_back(Res);
           else
-            ResultVals.push_back(Tmp1.getValue(i));
+            ResultVals.push_back(Res.getValue(i));
         }
-        if (Tmp1.getNode() != Node || Tmp1.getResNo() != 0) {
+        if (Res.getNode() != Node || Res.getResNo() != 0) {
           DAG.ReplaceAllUsesWith(Node, ResultVals.data());
           for (unsigned i = 0, e = Node->getNumValues(); i != e; ++i)
             DAG.TransferDbgValues(SDValue(Node, i), ResultVals[i]);
@@ -1314,7 +1318,7 @@ void SelectionDAGLegalize::LegalizeOp(SDNode *Node) {
         }
         return;
       }
-
+    }
       // FALL THROUGH
     case TargetLowering::Expand:
       ExpandNode(Node);