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author | Hal Finkel <hfinkel@anl.gov> | 2013-07-09 17:02:45 +0000 |
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committer | Hal Finkel <hfinkel@anl.gov> | 2013-07-09 17:02:45 +0000 |
commit | bd6f1f6896275e04ce46c9ef82fd96e2e6c125dd (patch) | |
tree | 50d0eb0284aa2922c94c32e88017656e7d9171eb /lib/CodeGen/SelectionDAG | |
parent | 7a34599db017a5486cf7cd11eb124984acec8286 (diff) | |
download | external_llvm-bd6f1f6896275e04ce46c9ef82fd96e2e6c125dd.zip external_llvm-bd6f1f6896275e04ce46c9ef82fd96e2e6c125dd.tar.gz external_llvm-bd6f1f6896275e04ce46c9ef82fd96e2e6c125dd.tar.bz2 |
DAGCombine tryFoldToZero cannot create illegal types after type legalization
When folding sub x, x (and other similar constructs), where x is a vector, the
result is a vector of zeros. After type legalization, make sure that the input
zero elements have a legal type. This type may be larger than the result's
vector element type.
This was another bug found by llvm-stress.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185949 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/SelectionDAG')
-rw-r--r-- | lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 15 |
1 files changed, 11 insertions, 4 deletions
diff --git a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp index fb17c93..9eb63e2 100644 --- a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp +++ b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp @@ -1613,12 +1613,19 @@ SDValue DAGCombiner::visitADDE(SDNode *N) { // Since it may not be valid to emit a fold to zero for vector initializers // check if we can before folding. static SDValue tryFoldToZero(SDLoc DL, const TargetLowering &TLI, EVT VT, - SelectionDAG &DAG, bool LegalOperations) { + SelectionDAG &DAG, + bool LegalOperations, bool LegalTypes) { if (!VT.isVector()) return DAG.getConstant(0, VT); if (!LegalOperations || TLI.isOperationLegal(ISD::BUILD_VECTOR, VT)) { // Produce a vector of zeros. - SDValue El = DAG.getConstant(0, VT.getVectorElementType()); + EVT ElemTy = VT.getVectorElementType(); + if (LegalTypes && TLI.getTypeAction(*DAG.getContext(), ElemTy) == + TargetLowering::TypePromoteInteger) + ElemTy = TLI.getTypeToTransformTo(*DAG.getContext(), ElemTy); + assert((!LegalTypes || TLI.isTypeLegal(ElemTy)) && + "Type for zero vector elements is not legal"); + SDValue El = DAG.getConstant(0, ElemTy); std::vector<SDValue> Ops(VT.getVectorNumElements(), El); return DAG.getNode(ISD::BUILD_VECTOR, DL, VT, &Ops[0], Ops.size()); @@ -1648,7 +1655,7 @@ SDValue DAGCombiner::visitSUB(SDNode *N) { // fold (sub x, x) -> 0 // FIXME: Refactor this and xor and other similar operations together. if (N0 == N1) - return tryFoldToZero(SDLoc(N), TLI, VT, DAG, LegalOperations); + return tryFoldToZero(SDLoc(N), TLI, VT, DAG, LegalOperations, LegalTypes); // fold (sub c1, c2) -> c1-c2 if (N0C && N1C) return DAG.FoldConstantArithmetic(ISD::SUB, VT, N0C, N1C); @@ -3519,7 +3526,7 @@ SDValue DAGCombiner::visitXOR(SDNode *N) { } // fold (xor x, x) -> 0 if (N0 == N1) - return tryFoldToZero(SDLoc(N), TLI, VT, DAG, LegalOperations); + return tryFoldToZero(SDLoc(N), TLI, VT, DAG, LegalOperations, LegalTypes); // Simplify: xor (op x...), (op y...) -> (op (xor x, y)) if (N0.getOpcode() == N1.getOpcode()) { |