aboutsummaryrefslogtreecommitdiffstats
path: root/lib/CodeGen/SelectionDAG
diff options
context:
space:
mode:
authorJakob Stoklund Olesen <stoklund@2pi.dk>2010-05-26 00:28:19 +0000
committerJakob Stoklund Olesen <stoklund@2pi.dk>2010-05-26 00:28:19 +0000
commitdd65ed483487d5c4e6b3f16eaa70a74362864893 (patch)
tree93f2e7b40f4ff7487a536b62da8f6dd2e2531b87 /lib/CodeGen/SelectionDAG
parentac79ed164b7f70ab2f16557c7d4eed7e9db3063a (diff)
downloadexternal_llvm-dd65ed483487d5c4e6b3f16eaa70a74362864893.zip
external_llvm-dd65ed483487d5c4e6b3f16eaa70a74362864893.tar.gz
external_llvm-dd65ed483487d5c4e6b3f16eaa70a74362864893.tar.bz2
Replace the SubRegSet tablegen class with a less error-prone mechanism.
A Register with subregisters must also provide SubRegIndices for adressing the subregisters. TableGen automatically inherits indices for sub-subregisters to minimize typing. CompositeIndices may be specified for the weirder cases such as the XMM sub_sd index that returns the same register, and ARM NEON Q registers where both D subregs have ssub_0 and ssub_1 sub-subregs. It is now required that all subregisters are named by an index, and a future patch will also require inherited subregisters to be named. This is necessary to allow composite subregister indices to be reduced to a single index. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104654 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/SelectionDAG')
0 files changed, 0 insertions, 0 deletions