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author | Stephen Hines <srhines@google.com> | 2014-12-04 02:59:27 +0000 |
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committer | Gerrit Code Review <noreply-gerritcodereview@google.com> | 2014-12-04 02:59:28 +0000 |
commit | 876d6995443e99d13696f3941c3a789a4daa7c7a (patch) | |
tree | 8fb36d3910e3ee4c4e1b7422f4f017108efc52f5 /lib/CodeGen/StackMaps.cpp | |
parent | d2327b22152ced7bc46dc629fc908959e8a52d03 (diff) | |
parent | 37ed9c199ca639565f6ce88105f9e39e898d82d0 (diff) | |
download | external_llvm-876d6995443e99d13696f3941c3a789a4daa7c7a.zip external_llvm-876d6995443e99d13696f3941c3a789a4daa7c7a.tar.gz external_llvm-876d6995443e99d13696f3941c3a789a4daa7c7a.tar.bz2 |
Merge "Update aosp/master LLVM for rebase to r222494."
Diffstat (limited to 'lib/CodeGen/StackMaps.cpp')
-rw-r--r-- | lib/CodeGen/StackMaps.cpp | 32 |
1 files changed, 24 insertions, 8 deletions
diff --git a/lib/CodeGen/StackMaps.cpp b/lib/CodeGen/StackMaps.cpp index 1473fc1..d3791c3 100644 --- a/lib/CodeGen/StackMaps.cpp +++ b/lib/CodeGen/StackMaps.cpp @@ -24,6 +24,7 @@ #include "llvm/Target/TargetMachine.h" #include "llvm/Target/TargetOpcodes.h" #include "llvm/Target/TargetRegisterInfo.h" +#include "llvm/Target/TargetSubtargetInfo.h" #include <iterator> using namespace llvm; @@ -83,7 +84,8 @@ StackMaps::parseOperand(MachineInstr::const_mop_iterator MOI, switch (MOI->getImm()) { default: llvm_unreachable("Unrecognized operand type."); case StackMaps::DirectMemRefOp: { - unsigned Size = AP.TM.getDataLayout()->getPointerSizeInBits(); + unsigned Size = + AP.TM.getSubtargetImpl()->getDataLayout()->getPointerSizeInBits(); assert((Size % 8) == 0 && "Need pointer size in bytes."); Size /= 8; unsigned Reg = (++MOI)->getReg(); @@ -122,7 +124,8 @@ StackMaps::parseOperand(MachineInstr::const_mop_iterator MOI, assert(TargetRegisterInfo::isPhysicalRegister(MOI->getReg()) && "Virtreg operands should have been rewritten before now."); const TargetRegisterClass *RC = - AP.TM.getRegisterInfo()->getMinimalPhysRegClass(MOI->getReg()); + AP.TM.getSubtargetImpl()->getRegisterInfo()->getMinimalPhysRegClass( + MOI->getReg()); assert(!MOI->getSubReg() && "Physical subreg still around."); Locs.push_back( Location(Location::Register, RC->getSize(), MOI->getReg(), 0)); @@ -158,7 +161,7 @@ StackMaps::createLiveOutReg(unsigned Reg, const TargetRegisterInfo *TRI) const { StackMaps::LiveOutVec StackMaps::parseRegisterLiveOutMask(const uint32_t *Mask) const { assert(Mask && "No register mask specified"); - const TargetRegisterInfo *TRI = AP.TM.getRegisterInfo(); + const TargetRegisterInfo *TRI = AP.TM.getSubtargetImpl()->getRegisterInfo(); LiveOutVec LiveOuts; // Create a LiveOutReg for each bit that is set in the register mask. @@ -217,9 +220,18 @@ void StackMaps::recordStackMapOpers(const MachineInstr &MI, uint64_t ID, I != E; ++I) { // Constants are encoded as sign-extended integers. // -1 is directly encoded as .long 0xFFFFFFFF with no constant pool. - if (I->LocType == Location::Constant && - ((I->Offset + (int64_t(1)<<31)) >> 32) != 0) { + if (I->LocType == Location::Constant && !isInt<32>(I->Offset)) { I->LocType = Location::ConstantIndex; + // ConstPool is intentionally a MapVector of 'uint64_t's (as + // opposed to 'int64_t's). We should never be in a situation + // where we have to insert either the tombstone or the empty + // keys into a map, and for a DenseMap<uint64_t, T> these are + // (uint64_t)0 and (uint64_t)-1. They can be and are + // represented using 32 bit integers. + + assert((uint64_t)I->Offset != DenseMapInfo<uint64_t>::getEmptyKey() && + (uint64_t)I->Offset != DenseMapInfo<uint64_t>::getTombstoneKey() && + "empty and tombstone keys should fit in 32 bits!"); auto Result = ConstPool.insert(std::make_pair(I->Offset, I->Offset)); I->Offset = Result.first - ConstPool.begin(); } @@ -232,12 +244,16 @@ void StackMaps::recordStackMapOpers(const MachineInstr &MI, uint64_t ID, MCSymbolRefExpr::Create(AP.CurrentFnSym, OutContext), OutContext); - CSInfos.push_back(CallsiteInfo(CSOffsetExpr, ID, Locations, LiveOuts)); + CSInfos.emplace_back(CSOffsetExpr, ID, std::move(Locations), + std::move(LiveOuts)); // Record the stack size of the current function. const MachineFrameInfo *MFI = AP.MF->getFrameInfo(); + const TargetRegisterInfo *RegInfo = AP.MF->getSubtarget().getRegisterInfo(); + const bool DynamicFrameSize = MFI->hasVarSizedObjects() || + RegInfo->needsStackRealignment(*(AP.MF)); FnStackSize[AP.CurrentFnSym] = - MFI->hasVarSizedObjects() ? UINT64_MAX : MFI->getStackSize(); + DynamicFrameSize ? UINT64_MAX : MFI->getStackSize(); } void StackMaps::recordStackMap(const MachineInstr &MI) { @@ -485,7 +501,7 @@ void StackMaps::serializeToStackMapSection() { MCContext &OutContext = AP.OutStreamer.getContext(); MCStreamer &OS = AP.OutStreamer; - const TargetRegisterInfo *TRI = AP.TM.getRegisterInfo(); + const TargetRegisterInfo *TRI = AP.TM.getSubtargetImpl()->getRegisterInfo(); // Create the section. const MCSection *StackMapSection = |