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authorEvan Cheng <evan.cheng@apple.com>2008-12-02 02:15:36 +0000
committerEvan Cheng <evan.cheng@apple.com>2008-12-02 02:15:36 +0000
commitbbe4105cd7c94e90ecc7de2be57c04b3d80bb267 (patch)
treece57328d53b77c84d58bf322665cf67d0bb7031c /lib/CodeGen/VirtRegMap.cpp
parent221cd2f0813be675784b9825aee9f74f22026247 (diff)
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Fix PR3124: overly strict assert.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60392 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/VirtRegMap.cpp')
-rw-r--r--lib/CodeGen/VirtRegMap.cpp6
1 files changed, 4 insertions, 2 deletions
diff --git a/lib/CodeGen/VirtRegMap.cpp b/lib/CodeGen/VirtRegMap.cpp
index 7ce5347..dab0215 100644
--- a/lib/CodeGen/VirtRegMap.cpp
+++ b/lib/CodeGen/VirtRegMap.cpp
@@ -1760,8 +1760,10 @@ void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM) {
SmallVector<unsigned, 2> KillRegs;
InvalidateKills(MI, RegKills, KillOps, &KillRegs);
if (MO.isDead() && !KillRegs.empty()) {
- // Source register or an implicit super-register use is killed.
- assert(KillRegs[0] == Dst || TRI->isSubRegister(KillRegs[0], Dst));
+ // Source register or an implicit super/sub-register use is killed.
+ assert(KillRegs[0] == Dst ||
+ TRI->isSubRegister(KillRegs[0], Dst) ||
+ TRI->isSuperRegister(KillRegs[0], Dst));
// Last def is now dead.
TransferDeadness(&MBB, Dist, Src, RegKills, KillOps);
}