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author | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2011-11-13 01:23:34 +0000 |
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committer | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2011-11-13 01:23:34 +0000 |
commit | 0cb80d9f0f71ff3faaf890bb9f023e53f4e8e3dc (patch) | |
tree | 078cdc8611297121da44249c3a1283d9b0cc6756 /lib/CodeGen/VirtRegMap.h | |
parent | cb39064e7aee2273da1d00e6b800db84ddc34b6b (diff) | |
download | external_llvm-0cb80d9f0f71ff3faaf890bb9f023e53f4e8e3dc.zip external_llvm-0cb80d9f0f71ff3faaf890bb9f023e53f4e8e3dc.tar.gz external_llvm-0cb80d9f0f71ff3faaf890bb9f023e53f4e8e3dc.tar.bz2 |
More dead code elimination in VirtRegMap.
This thing is looking a lot like a virtual register map now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144486 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/VirtRegMap.h')
-rw-r--r-- | lib/CodeGen/VirtRegMap.h | 14 |
1 files changed, 0 insertions, 14 deletions
diff --git a/lib/CodeGen/VirtRegMap.h b/lib/CodeGen/VirtRegMap.h index 68d817b..8cac311 100644 --- a/lib/CodeGen/VirtRegMap.h +++ b/lib/CodeGen/VirtRegMap.h @@ -18,22 +18,14 @@ #define LLVM_CODEGEN_VIRTREGMAP_H #include "llvm/CodeGen/MachineFunctionPass.h" -#include "llvm/CodeGen/LiveInterval.h" #include "llvm/Target/TargetRegisterInfo.h" -#include "llvm/ADT/BitVector.h" -#include "llvm/ADT/DenseMap.h" #include "llvm/ADT/IndexedMap.h" -#include "llvm/ADT/SmallPtrSet.h" -#include "llvm/ADT/SmallVector.h" -#include <map> namespace llvm { - class LiveIntervals; class MachineInstr; class MachineFunction; class MachineRegisterInfo; class TargetInstrInfo; - class TargetRegisterInfo; class raw_ostream; class SlotIndexes; @@ -45,18 +37,12 @@ namespace llvm { MAX_STACK_SLOT = (1L << 18)-1 }; - enum ModRef { isRef = 1, isMod = 2, isModRef = 3 }; - typedef std::multimap<MachineInstr*, - std::pair<unsigned, ModRef> > MI2VirtMapTy; - private: MachineRegisterInfo *MRI; const TargetInstrInfo *TII; const TargetRegisterInfo *TRI; MachineFunction *MF; - DenseMap<const TargetRegisterClass*, BitVector> allocatableRCRegs; - /// Virt2PhysMap - This is a virtual to physical register /// mapping. Each virtual register is required to have an entry in /// it; even spilled virtual registers (the register mapped to a |