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authorAndrew Trick <atrick@apple.com>2011-03-23 20:40:18 +0000
committerAndrew Trick <atrick@apple.com>2011-03-23 20:40:18 +0000
commit0d93a110e31b384f59d91d6be27388d8ded5f03c (patch)
tree5c693572b3abeea57e6af4ad22419a53cea04c5f /lib/CodeGen
parent8b54dca41c7420ecbca47bb8336e6e6c6e5f8433 (diff)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128163 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen')
-rw-r--r--lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp4
1 files changed, 2 insertions, 2 deletions
diff --git a/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp b/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
index ffe6b9c..aa93bba 100644
--- a/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
+++ b/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
@@ -1812,7 +1812,7 @@ void RegReductionPQBase::ScheduledNode(SUnit *SU) {
if (!SU->getNode())
return;
-
+
for (SUnit::pred_iterator I = SU->Preds.begin(), E = SU->Preds.end();
I != E; ++I) {
if (I->isCtrl())
@@ -1880,7 +1880,7 @@ void RegReductionPQBase::UnscheduledNode(SUnit *SU) {
const SDNode *N = SU->getNode();
if (!N) return;
-
+
if (!N->isMachineOpcode()) {
if (N->getOpcode() != ISD::CopyToReg)
return;