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authorLang Hames <lhames@gmail.com>2012-02-28 22:07:24 +0000
committerLang Hames <lhames@gmail.com>2012-02-28 22:07:24 +0000
commit1485455be0310c6b24f096823029e08867531016 (patch)
treeb93e7bbb28a188b39bf5c9e1dfca59a26a61712b /lib/CodeGen
parent489d67927172941bf59b9f4829ab8910814fea24 (diff)
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Kill off LiveRangeEdit::getNewVRegs and LiveRangeEdit::getUselessVRegs. These
methods are no longer needed now that LinearScan has gone away. (Contains tweaks trivialSpillEverywhere to enable the removal of getNewVRegs). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151658 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen')
-rw-r--r--lib/CodeGen/LiveRangeEdit.cpp5
-rw-r--r--lib/CodeGen/LiveRangeEdit.h14
-rw-r--r--lib/CodeGen/RegAllocBasic.cpp2
-rw-r--r--lib/CodeGen/Spiller.cpp20
4 files changed, 10 insertions, 31 deletions
diff --git a/lib/CodeGen/LiveRangeEdit.cpp b/lib/CodeGen/LiveRangeEdit.cpp
index 952a1e1..f9b93d5 100644
--- a/lib/CodeGen/LiveRangeEdit.cpp
+++ b/lib/CodeGen/LiveRangeEdit.cpp
@@ -94,11 +94,6 @@ bool LiveRangeEdit::allUsesAvailableAt(const MachineInstr *OrigMI,
// Reserved registers are OK.
if (MO.isUndef() || !lis.hasInterval(MO.getReg()))
continue;
- // We cannot depend on virtual registers in uselessRegs_.
- if (uselessRegs_)
- for (unsigned ui = 0, ue = uselessRegs_->size(); ui != ue; ++ui)
- if ((*uselessRegs_)[ui]->reg == MO.getReg())
- return false;
LiveInterval &li = lis.getInterval(MO.getReg());
const VNInfo *OVNI = li.getVNInfoAt(OrigIdx);
diff --git a/lib/CodeGen/LiveRangeEdit.h b/lib/CodeGen/LiveRangeEdit.h
index 29361ac..1148025 100644
--- a/lib/CodeGen/LiveRangeEdit.h
+++ b/lib/CodeGen/LiveRangeEdit.h
@@ -57,7 +57,6 @@ private:
LiveInterval &parent_;
SmallVectorImpl<LiveInterval*> &newRegs_;
Delegate *const delegate_;
- const SmallVectorImpl<LiveInterval*> *uselessRegs_;
/// firstNew_ - Index of the first register added to newRegs_.
const unsigned firstNew_;
@@ -93,15 +92,11 @@ public:
/// @param parent The register being spilled or split.
/// @param newRegs List to receive any new registers created. This needn't be
/// empty initially, any existing registers are ignored.
- /// @param uselessRegs List of registers that can't be used when
- /// rematerializing values because they are about to be removed.
LiveRangeEdit(LiveInterval &parent,
SmallVectorImpl<LiveInterval*> &newRegs,
- Delegate *delegate = 0,
- const SmallVectorImpl<LiveInterval*> *uselessRegs = 0)
+ Delegate *delegate = 0)
: parent_(parent), newRegs_(newRegs),
delegate_(delegate),
- uselessRegs_(uselessRegs),
firstNew_(newRegs.size()),
scannedRemattable_(false) {}
@@ -120,13 +115,6 @@ public:
return makeArrayRef(newRegs_).slice(firstNew_);
}
- /// FIXME: Temporary accessors until we can get rid of
- /// LiveIntervals::AddIntervalsForSpills
- SmallVectorImpl<LiveInterval*> *getNewVRegs() { return &newRegs_; }
- const SmallVectorImpl<LiveInterval*> *getUselessVRegs() {
- return uselessRegs_;
- }
-
/// createFrom - Create a new virtual register based on OldReg.
LiveInterval &createFrom(unsigned OldReg, LiveIntervals&, VirtRegMap&);
diff --git a/lib/CodeGen/RegAllocBasic.cpp b/lib/CodeGen/RegAllocBasic.cpp
index d1b289b..2e79c79 100644
--- a/lib/CodeGen/RegAllocBasic.cpp
+++ b/lib/CodeGen/RegAllocBasic.cpp
@@ -187,7 +187,7 @@ void RABasic::spillReg(LiveInterval& VirtReg, unsigned PhysReg,
unassign(SpilledVReg, PhysReg);
// Spill the extracted interval.
- LiveRangeEdit LRE(SpilledVReg, SplitVRegs, 0, &PendingSpills);
+ LiveRangeEdit LRE(SpilledVReg, SplitVRegs);
spiller().spill(LRE);
}
// After extracting segments, the query's results are invalid. But keep the
diff --git a/lib/CodeGen/Spiller.cpp b/lib/CodeGen/Spiller.cpp
index 8168d87..b72dea7 100644
--- a/lib/CodeGen/Spiller.cpp
+++ b/lib/CodeGen/Spiller.cpp
@@ -72,8 +72,9 @@ protected:
/// Add spill ranges for every use/def of the live interval, inserting loads
/// immediately before each use, and stores after each def. No folding or
/// remat is attempted.
- void trivialSpillEverywhere(LiveInterval *li,
- SmallVectorImpl<LiveInterval*> &newIntervals) {
+ void trivialSpillEverywhere(LiveRangeEdit& LRE) {
+ LiveInterval* li = &LRE.getParent();
+
DEBUG(dbgs() << "Spilling everywhere " << *li << "\n");
assert(li->weight != HUGE_VALF &&
@@ -115,17 +116,14 @@ protected:
}
// Create a new vreg & interval for this instr.
- unsigned newVReg = mri->createVirtualRegister(trc);
- vrm->grow();
- vrm->assignVirt2StackSlot(newVReg, ss);
- LiveInterval *newLI = &lis->getOrCreateInterval(newVReg);
+ LiveInterval *newLI = &LRE.create(*lis, *vrm);
newLI->weight = HUGE_VALF;
// Update the reg operands & kill flags.
for (unsigned i = 0; i < indices.size(); ++i) {
unsigned mopIdx = indices[i];
MachineOperand &mop = mi->getOperand(mopIdx);
- mop.setReg(newVReg);
+ mop.setReg(newLI->reg);
if (mop.isUse() && !mi->isRegTiedToDefOperand(mopIdx)) {
mop.setIsKill(true);
}
@@ -135,7 +133,7 @@ protected:
// Insert reload if necessary.
MachineBasicBlock::iterator miItr(mi);
if (hasUse) {
- tii->loadRegFromStackSlot(*mi->getParent(), miItr, newVReg, ss, trc,
+ tii->loadRegFromStackSlot(*mi->getParent(), miItr, newLI->reg, ss, trc,
tri);
MachineInstr *loadInstr(prior(miItr));
SlotIndex loadIndex =
@@ -148,7 +146,7 @@ protected:
// Insert store if necessary.
if (hasDef) {
- tii->storeRegToStackSlot(*mi->getParent(), llvm::next(miItr), newVReg,
+ tii->storeRegToStackSlot(*mi->getParent(), llvm::next(miItr),newLI->reg,
true, ss, trc, tri);
MachineInstr *storeInstr(llvm::next(miItr));
SlotIndex storeIndex =
@@ -158,8 +156,6 @@ protected:
newLI->getNextValue(beginIndex, lis->getVNInfoAllocator());
newLI->addRange(LiveRange(beginIndex, storeIndex, storeVNI));
}
-
- newIntervals.push_back(newLI);
}
}
};
@@ -179,7 +175,7 @@ public:
void spill(LiveRangeEdit &LRE) {
// Ignore spillIs - we don't use it.
- trivialSpillEverywhere(&LRE.getParent(), *LRE.getNewVRegs());
+ trivialSpillEverywhere(LRE);
}
};