Move stack slot assignments into LiveRangeEdit.

All registers created during splitting or spilling are assigned to the same
stack slot as the parent register.

When splitting or rematting, we may not spill at all. In that case the stack
slot is still assigned, but it will be dead.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116546 91177308-0d34-0410-b5e6-96231b3b80d8

4 files changed, 16 insertions, 10 deletions

diff --git a/lib/CodeGen/InlineSpiller.cpp b/lib/CodeGen/InlineSpiller.cpp
index 60181d7..94a40c4 100644
--- a/lib/CodeGen/InlineSpiller.cpp
+++ b/lib/CodeGen/InlineSpiller.cpp
@@ -371,9 +371,7 @@ void InlineSpiller::spill(LiveRangeEdit &edit) {
     return;
 
   rc_ = mri_.getRegClass(edit.getReg());
-  stackSlot_ = vrm_.getStackSlot(edit.getReg());
-  if (stackSlot_ == VirtRegMap::NO_STACK_SLOT)
-    stackSlot_ = vrm_.assignVirt2StackSlot(edit.getReg());
+  stackSlot_ = edit.assignStackSlot(vrm_);
 
   // Iterate over instructions using register.
   for (MachineRegisterInfo::reg_iterator RI = mri_.reg_begin(edit.getReg());
diff --git a/lib/CodeGen/LiveRangeEdit.cpp b/lib/CodeGen/LiveRangeEdit.cpp
index 8a123fb..463ebcb 100644
--- a/lib/CodeGen/LiveRangeEdit.cpp
+++ b/lib/CodeGen/LiveRangeEdit.cpp
@@ -18,12 +18,21 @@
 
 using namespace llvm;
 
+int LiveRangeEdit::assignStackSlot(VirtRegMap &vrm) {
+  int ss = vrm.getStackSlot(getReg());
+  if (ss != VirtRegMap::NO_STACK_SLOT)
+    return ss;
+  return vrm.assignVirt2StackSlot(getReg());
+}
+
 LiveInterval &LiveRangeEdit::create(MachineRegisterInfo &mri,
                                     LiveIntervals &lis,
                                     VirtRegMap &vrm) {
   const TargetRegisterClass *RC = mri.getRegClass(parent_.reg);
   unsigned VReg = mri.createVirtualRegister(RC);
   vrm.grow();
+  // Immediately assign to the same stack slot as parent.
+  vrm.assignVirt2StackSlot(VReg, assignStackSlot(vrm));
   LiveInterval &li = lis.getOrCreateInterval(VReg);
   newRegs_.push_back(&li);
   return li;
diff --git a/lib/CodeGen/LiveRangeEdit.h b/lib/CodeGen/LiveRangeEdit.h
index 6abeda8..d9d9c61 100644
--- a/lib/CodeGen/LiveRangeEdit.h
+++ b/lib/CodeGen/LiveRangeEdit.h
@@ -55,7 +55,12 @@ public:
   iterator begin() const { return newRegs_.begin()+firstNew_; }
   iterator end() const { return newRegs_.end(); }
 
-  /// create - Create a new register with the same class as parentReg_.
+  /// assignStackSlot - Ensure a stack slot is assigned to parent.
+  /// @return the assigned stack slot number.
+  int assignStackSlot(VirtRegMap&);
+
+  /// create - Create a new register with the same class and stack slot as
+  /// parent.
   LiveInterval &create(MachineRegisterInfo&, LiveIntervals&, VirtRegMap&);
 
   /// allUsesAvailableAt - Return true if all registers used by OrigMI at
diff --git a/lib/CodeGen/SplitKit.cpp b/lib/CodeGen/SplitKit.cpp
index ea551bb..96ccf30 100644
--- a/lib/CodeGen/SplitKit.cpp
+++ b/lib/CodeGen/SplitKit.cpp
@@ -591,12 +591,6 @@ SplitEditor::SplitEditor(SplitAnalysis &sa, LiveIntervals &lis, VirtRegMap &vrm,
     openli_(lis_, *curli_)
 {
   assert(curli_ && "SplitEditor created from empty SplitAnalysis");
-
-  // Make sure curli_ is assigned a stack slot, so all our intervals get the
-  // same slot as curli_.
-  if (vrm_.getStackSlot(curli_->reg) == VirtRegMap::NO_STACK_SLOT)
-    vrm_.assignVirt2StackSlot(curli_->reg);
-
 }
 
 bool SplitEditor::intervalsLiveAt(SlotIndex Idx) const {