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author | Cameron Zwarich <zwarich@apple.com> | 2011-02-22 03:24:52 +0000 |
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committer | Cameron Zwarich <zwarich@apple.com> | 2011-02-22 03:24:52 +0000 |
commit | 4ecc82e592745d6995db83ea158b3c15011a84f8 (patch) | |
tree | 51d712505461ec31550116b8bfea64e48ad17fcf /lib/CodeGen | |
parent | ec243ae2b859487bd417a1289da2a4a5901c3469 (diff) | |
download | external_llvm-4ecc82e592745d6995db83ea158b3c15011a84f8.zip external_llvm-4ecc82e592745d6995db83ea158b3c15011a84f8.tar.gz external_llvm-4ecc82e592745d6995db83ea158b3c15011a84f8.tar.bz2 |
Roll out r126169 and r126170 in an attempt to fix the selfhost bot.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126185 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen')
-rw-r--r-- | lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp | 8 | ||||
-rw-r--r-- | lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | 8 | ||||
-rw-r--r-- | lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp | 52 |
3 files changed, 9 insertions, 59 deletions
diff --git a/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp b/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp index 8adaf05..98582ba 100644 --- a/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp +++ b/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp @@ -127,13 +127,10 @@ void FunctionLoweringInfo::set(const Function &fn, MachineFunction &mf) { for (BasicBlock::const_iterator I = BB->begin(), E = BB->end(); I != E; ++I) { // Mark values used outside their block as exported, by allocating // a virtual register for them. - if (!EnableFastISel && isa<PHINode>(I)) { - PHIDestRegs.insert(InitializeRegForValue(I)); - } else if (isUsedOutsideOfDefiningBlock(I)) { + if (isUsedOutsideOfDefiningBlock(I)) if (!isa<AllocaInst>(I) || !StaticAllocaMap.count(cast<AllocaInst>(I))) InitializeRegForValue(I); - } // Collect llvm.dbg.declare information. This is done now instead of // during the initial isel pass through the IR so that it is done @@ -222,9 +219,6 @@ void FunctionLoweringInfo::clear() { CatchInfoFound.clear(); #endif LiveOutRegInfo.clear(); - VisitedBBs.clear(); - PHIDestRegs.clear(); - PHISrcToDestMap.clear(); ArgDbgValues.clear(); ByValArgFrameIndexMap.clear(); RegFixups.clear(); diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp index c1be3e9..452f561 100644 --- a/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp +++ b/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp @@ -644,10 +644,7 @@ SDValue RegsForValue::getCopyFromRegs(SelectionDAG &DAG, !RegisterVT.isInteger() || RegisterVT.isVector() || !FuncInfo.LiveOutRegInfo.inBounds(Regs[Part+i])) continue; - - if (FuncInfo.PHIDestRegs.count(Regs[Part+i]) && !FuncInfo.AllPredsVisited) - continue; - + const FunctionLoweringInfo::LiveOutInfo &LOI = FuncInfo.LiveOutRegInfo[Regs[Part+i]]; @@ -6469,9 +6466,6 @@ SelectionDAGBuilder::HandlePHINodesInSuccessorBlocks(const BasicBlock *LLVMBB) { } } - if (!EnableFastISel) - FuncInfo.PHISrcToDestMap[Reg] = FuncInfo.ValueMap[PN]; - // Remember that this register needs to added to the machine PHI node as // the input for this MBB. SmallVector<EVT, 4> ValueVTs; diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp index 450757f..ae63f2e 100644 --- a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp +++ b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp @@ -49,7 +49,6 @@ #include "llvm/Support/ErrorHandling.h" #include "llvm/Support/Timer.h" #include "llvm/Support/raw_ostream.h" -#include "llvm/ADT/PostOrderIterator.h" #include "llvm/ADT/Statistic.h" #include <algorithm> using namespace llvm; @@ -471,13 +470,6 @@ void SelectionDAGISel::ComputeLiveOutVRegInfo() { if (!TargetRegisterInfo::isVirtualRegister(DestReg)) continue; - bool IsPHI = false; - DenseMap<unsigned, unsigned>::const_iterator It = FuncInfo->PHISrcToDestMap.find(DestReg); - if (It != FuncInfo->PHISrcToDestMap.end()) { - IsPHI = true; - DestReg = It->second; - } - // Ignore non-scalar or non-integer values. SDValue Src = N->getOperand(2); EVT SrcVT = Src.getValueType(); @@ -489,27 +481,14 @@ void SelectionDAGISel::ComputeLiveOutVRegInfo() { CurDAG->ComputeMaskedBits(Src, Mask, KnownZero, KnownOne); // Only install this information if it tells us something. - if (!IsPHI && NumSignBits == 1 && KnownZero == 0 && KnownOne == 0) - continue; - - FuncInfo->LiveOutRegInfo.grow(DestReg); - FunctionLoweringInfo::LiveOutInfo &LOI = FuncInfo->LiveOutRegInfo[DestReg]; - - // If this is a PHI and there is existing information, merge it with the - // information from this block. - if (IsPHI && LOI.IsValid) { + if (NumSignBits != 1 || KnownZero != 0 || KnownOne != 0) { + FuncInfo->LiveOutRegInfo.grow(DestReg); FunctionLoweringInfo::LiveOutInfo &LOI = FuncInfo->LiveOutRegInfo[DestReg]; - LOI.NumSignBits = std::min(LOI.NumSignBits, NumSignBits); - LOI.KnownOne &= KnownOne; - LOI.KnownZero &= KnownZero; - continue; + LOI.NumSignBits = NumSignBits; + LOI.KnownOne = KnownOne; + LOI.KnownZero = KnownZero; } - - LOI.NumSignBits = NumSignBits; - LOI.KnownOne = KnownOne; - LOI.KnownZero = KnownZero; - LOI.IsValid = true; } while (!Worklist.empty()); } @@ -853,28 +832,11 @@ void SelectionDAGISel::SelectAllBasicBlocks(const Function &Fn) { FastIS = TLI.createFastISel(*FuncInfo); // Iterate over all basic blocks in the function. - ReversePostOrderTraversal<const Function*> RPOT(&Fn); - for (ReversePostOrderTraversal<const Function*>::rpo_iterator - I = RPOT.begin(), E = RPOT.end(); I != E; ++I) { - const BasicBlock *LLVMBB = *I; + for (Function::const_iterator I = Fn.begin(), E = Fn.end(); I != E; ++I) { + const BasicBlock *LLVMBB = &*I; #ifndef NDEBUG CheckLineNumbers(LLVMBB); #endif - - if (EnableFastISel) { - FuncInfo->AllPredsVisited = false; - } else { - FuncInfo->AllPredsVisited = true; - for (const_pred_iterator PI = pred_begin(LLVMBB), PE = pred_end(LLVMBB); - PI != PE; ++PI) { - if (!FuncInfo->VisitedBBs.count(*PI)) { - FuncInfo->AllPredsVisited = false; - break; - } - } - FuncInfo->VisitedBBs.insert(LLVMBB); - } - FuncInfo->MBB = FuncInfo->MBBMap[LLVMBB]; FuncInfo->InsertPt = FuncInfo->MBB->getFirstNonPHI(); |