aboutsummaryrefslogtreecommitdiffstats
path: root/lib/CodeGen
diff options
context:
space:
mode:
authorDuncan Sands <baldrick@free.fr>2007-11-09 08:57:19 +0000
committerDuncan Sands <baldrick@free.fr>2007-11-09 08:57:19 +0000
commit4f18d4f7d6ed1bdddc07599c0e946557107423eb (patch)
tree4c3db1fd150addb8ddb1793a79cf3a443c714fb8 /lib/CodeGen
parentd794c85d464278bbfafaaa162e38dcf21f10881d (diff)
downloadexternal_llvm-4f18d4f7d6ed1bdddc07599c0e946557107423eb.zip
external_llvm-4f18d4f7d6ed1bdddc07599c0e946557107423eb.tar.gz
external_llvm-4f18d4f7d6ed1bdddc07599c0e946557107423eb.tar.bz2
Fix some load/store logic that would be wrong for
apints on big-endian machines if the bitwidth is not a multiple of 8. Introduce a new helper, MVT::getStoreSizeInBits, and use it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43934 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen')
-rw-r--r--lib/CodeGen/SelectionDAG/DAGCombiner.cpp12
-rw-r--r--lib/CodeGen/SelectionDAG/LegalizeDAGTypes.cpp4
2 files changed, 10 insertions, 6 deletions
diff --git a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index 73d7db4..7a6e55e 100644
--- a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -1713,8 +1713,9 @@ SDOperand DAGCombiner::visitAND(SDNode *N) {
// For big endian targets, we need to add an offset to the pointer to
// load the correct bytes. For little endian systems, we merely need to
// read fewer bytes from the same pointer.
- unsigned PtrOff =
- (MVT::getSizeInBits(LoadedVT) - MVT::getSizeInBits(EVT)) / 8;
+ unsigned LVTStoreBytes = MVT::getStoreSizeInBits(LoadedVT)/8;
+ unsigned EVTStoreBytes = MVT::getStoreSizeInBits(EVT)/8;
+ unsigned PtrOff = LVTStoreBytes - EVTStoreBytes;
unsigned Alignment = LN0->getAlignment();
SDOperand NewPtr = LN0->getBasePtr();
if (!TLI.isLittleEndian()) {
@@ -2991,8 +2992,11 @@ SDOperand DAGCombiner::ReduceLoadWidth(SDNode *N) {
MVT::ValueType PtrType = N0.getOperand(1).getValueType();
// For big endian targets, we need to adjust the offset to the pointer to
// load the correct bytes.
- if (!TLI.isLittleEndian())
- ShAmt = MVT::getSizeInBits(N0.getValueType()) - ShAmt - EVTBits;
+ if (!TLI.isLittleEndian()) {
+ unsigned LVTStoreBits = MVT::getStoreSizeInBits(N0.getValueType());
+ unsigned EVTStoreBits = MVT::getStoreSizeInBits(EVT);
+ ShAmt = LVTStoreBits - EVTStoreBits - ShAmt;
+ }
uint64_t PtrOff = ShAmt / 8;
unsigned NewAlign = MinAlign(LN0->getAlignment(), PtrOff);
SDOperand NewPtr = DAG.getNode(ISD::ADD, PtrType, LN0->getBasePtr(),
diff --git a/lib/CodeGen/SelectionDAG/LegalizeDAGTypes.cpp b/lib/CodeGen/SelectionDAG/LegalizeDAGTypes.cpp
index 11431ee..8251341 100644
--- a/lib/CodeGen/SelectionDAG/LegalizeDAGTypes.cpp
+++ b/lib/CodeGen/SelectionDAG/LegalizeDAGTypes.cpp
@@ -1036,7 +1036,7 @@ void DAGTypeLegalizer::ExpandResult_LOAD(LoadSDNode *N,
// Big-endian - high bits are at low addresses. Favor aligned loads at
// the cost of some bit-fiddling.
MVT::ValueType EVT = N->getLoadedVT();
- unsigned EBytes = (MVT::getSizeInBits(EVT) + 7)/8;
+ unsigned EBytes = MVT::getStoreSizeInBits(EVT)/8;
unsigned IncrementSize = MVT::getSizeInBits(NVT)/8;
unsigned ExcessBits = (EBytes - IncrementSize)*8;
@@ -2069,7 +2069,7 @@ SDOperand DAGTypeLegalizer::ExpandOperand_STORE(StoreSDNode *N, unsigned OpNo) {
GetExpandedOp(N->getValue(), Lo, Hi);
MVT::ValueType EVT = N->getStoredVT();
- unsigned EBytes = (MVT::getSizeInBits(EVT) + 7)/8;
+ unsigned EBytes = MVT::getStoreSizeInBits(EVT)/8;
unsigned IncrementSize = MVT::getSizeInBits(NVT)/8;
unsigned ExcessBits = (EBytes - IncrementSize)*8;
MVT::ValueType HiVT =