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| author | Dan Gohman <gohman@apple.com> | 2010-05-11 21:59:14 +0000 |
|---|---|---|
| committer | Dan Gohman <gohman@apple.com> | 2010-05-11 21:59:14 +0000 |
| commit | 687956a7f61e50f67d231de0826c547fa77c01a9 (patch) | |
| tree | 6fbe2e9c30af10f66c18d96f9f31a9ed1caf49da /lib/CodeGen | |
| parent | 057000a0279da7b4d63dc02daed2ea4066518dd8 (diff) | |
| download | external_llvm-687956a7f61e50f67d231de0826c547fa77c01a9.zip external_llvm-687956a7f61e50f67d231de0826c547fa77c01a9.tar.gz external_llvm-687956a7f61e50f67d231de0826c547fa77c01a9.tar.bz2 | |
Don't set kill flags on uses of CopyFromReg nodes. InstrEmitter doesn't
create separate virtual registers for CopyFromReg values, so uses of
them don't necessarily kill the value.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103519 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen')
| -rw-r--r-- | lib/CodeGen/SelectionDAG/InstrEmitter.cpp | 25 |
1 files changed, 16 insertions, 9 deletions
diff --git a/lib/CodeGen/SelectionDAG/InstrEmitter.cpp b/lib/CodeGen/SelectionDAG/InstrEmitter.cpp index a5db63b..929287a 100644 --- a/lib/CodeGen/SelectionDAG/InstrEmitter.cpp +++ b/lib/CodeGen/SelectionDAG/InstrEmitter.cpp @@ -297,15 +297,22 @@ InstrEmitter::AddRegisterOperand(MachineInstr *MI, SDValue Op, } // If this value has only one use, that use is a kill. This is a - // conservative approximation. Tied operands are never killed, so we need - // to check that. And that means we need to determine the index of the - // operand. - unsigned Idx = MI->getNumOperands(); - while (Idx > 0 && - MI->getOperand(Idx-1).isReg() && MI->getOperand(Idx-1).isImplicit()) - --Idx; - bool isTied = MI->getDesc().getOperandConstraint(Idx, TOI::TIED_TO) != -1; - bool isKill = Op.hasOneUse() && !isTied && !IsDebug; + // conservative approximation. InstrEmitter does trivial coalescing + // with CopyFromReg nodes, so don't emit kill flags for them. + // Tied operands are never killed, so we need to check that. And that + // means we need to determine the index of the operand. + bool isKill = Op.hasOneUse() && + Op.getNode()->getOpcode() != ISD::CopyFromReg && + !IsDebug; + if (isKill) { + unsigned Idx = MI->getNumOperands(); + while (Idx > 0 && + MI->getOperand(Idx-1).isReg() && MI->getOperand(Idx-1).isImplicit()) + --Idx; + bool isTied = MI->getDesc().getOperandConstraint(Idx, TOI::TIED_TO) != -1; + if (isTied) + isKill = false; + } MI->addOperand(MachineOperand::CreateReg(VReg, isOptDef, false/*isImp*/, isKill, |
