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author | Chris Lattner <sabre@nondot.org> | 2002-05-22 17:08:27 +0000 |
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committer | Chris Lattner <sabre@nondot.org> | 2002-05-22 17:08:27 +0000 |
commit | 70e60cbd4dd59b61e3e9d0a55f24cf92b0dc8724 (patch) | |
tree | 2bf3f9e800864c8f2e76a41aa932e31c09266422 /lib/CodeGen | |
parent | 59dcbf9c037ba3f03efdc7371514ced1a63d6c55 (diff) | |
download | external_llvm-70e60cbd4dd59b61e3e9d0a55f24cf92b0dc8724.zip external_llvm-70e60cbd4dd59b61e3e9d0a55f24cf92b0dc8724.tar.gz external_llvm-70e60cbd4dd59b61e3e9d0a55f24cf92b0dc8724.tar.bz2 |
Move debug options out of header files so that the header does not have
to #include CommandLine.h.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@2712 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen')
-rw-r--r-- | lib/CodeGen/InstrSched/InstrScheduling.cpp | 5 | ||||
-rw-r--r-- | lib/CodeGen/InstrSched/SchedPriorities.h | 3 | ||||
-rw-r--r-- | lib/CodeGen/RegAlloc/PhyRegAlloc.cpp | 9 |
3 files changed, 8 insertions, 9 deletions
diff --git a/lib/CodeGen/InstrSched/InstrScheduling.cpp b/lib/CodeGen/InstrSched/InstrScheduling.cpp index 0a6d1ce..2d2bc14 100644 --- a/lib/CodeGen/InstrSched/InstrScheduling.cpp +++ b/lib/CodeGen/InstrSched/InstrScheduling.cpp @@ -13,13 +13,14 @@ #include "llvm/Target/TargetMachine.h" #include "llvm/BasicBlock.h" #include "llvm/Instruction.h" +#include "Support/CommandLine.h" #include <algorithm> using std::cerr; using std::vector; -//************************* External Data Types *****************************/ +SchedDebugLevel_t SchedDebugLevel; -cl::Enum<enum SchedDebugLevel_t> SchedDebugLevel("dsched", cl::Hidden, +static cl::Enum<enum SchedDebugLevel_t> Opt(SchedDebugLevel,"dsched",cl::Hidden, "enable instruction scheduling debugging information", clEnumValN(Sched_NoDebugInfo, "n", "disable debug output"), clEnumValN(Sched_Disable, "off", "disable instruction scheduling"), diff --git a/lib/CodeGen/InstrSched/SchedPriorities.h b/lib/CodeGen/InstrSched/SchedPriorities.h index 3f087d5..a34557c 100644 --- a/lib/CodeGen/InstrSched/SchedPriorities.h +++ b/lib/CodeGen/InstrSched/SchedPriorities.h @@ -24,7 +24,6 @@ #include "SchedGraph.h" #include "llvm/CodeGen/InstrScheduling.h" #include "llvm/Target/MachineSchedInfo.h" -#include "Support/CommandLine.h" #include <list> #include <ext/hash_set> #include <iostream> @@ -44,7 +43,7 @@ enum SchedDebugLevel_t { Sched_PrintSchedGraphs, }; -extern cl::Enum<SchedDebugLevel_t> SchedDebugLevel; +extern SchedDebugLevel_t SchedDebugLevel; //--------------------------------------------------------------------------- // Function: instrIsFeasible diff --git a/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp b/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp index ab9b1a7..bd0db11 100644 --- a/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp +++ b/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp @@ -24,15 +24,14 @@ #include "llvm/Type.h" #include "llvm/iOther.h" #include "llvm/CodeGen/RegAllocCommon.h" +#include "Support/CommandLine.h" #include <iostream> #include <math.h> using std::cerr; - -// ***TODO: There are several places we add instructions. Validate the order -// of adding these instructions. - -cl::Enum<RegAllocDebugLevel_t> DEBUG_RA("dregalloc", cl::Hidden, +RegAllocDebugLevel_t DEBUG_RA; +static cl::Enum<RegAllocDebugLevel_t> DEBUG_RA_c(DEBUG_RA, "dregalloc", + cl::Hidden, "enable register allocation debugging information", clEnumValN(RA_DEBUG_None , "n", "disable debug output"), clEnumValN(RA_DEBUG_Normal , "y", "enable debug output"), |