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authorChris Lattner <sabre@nondot.org>2006-05-16 06:10:58 +0000
committerChris Lattner <sabre@nondot.org>2006-05-16 06:10:58 +0000
commit966454129dc62260df1f438f0243f6877dcd185c (patch)
treea369795fe4e9795c0afeeb9778e75b4f87342935 /lib/CodeGen
parent4e92027837136233db0fc1c1a4fa2bc456d74de3 (diff)
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Move function-live-in-handling code from the sdisel code to the scheduler.
This code should be emitted after legalize, so it can't be in sdisel. Note that the EmitFunctionEntryCode hook should be updated to operate on the DAG. The X86 backend is the only one currently using this hook. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28315 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen')
-rw-r--r--lib/CodeGen/SelectionDAG/ScheduleDAG.cpp14
-rw-r--r--lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp15
2 files changed, 15 insertions, 14 deletions
diff --git a/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp b/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
index 3fab99e..5230620 100644
--- a/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
+++ b/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
@@ -539,6 +539,20 @@ void ScheduleDAG::EmitNoop() {
/// EmitSchedule - Emit the machine code in scheduled order.
void ScheduleDAG::EmitSchedule() {
+ // If this is the first basic block in the function, and if it has live ins
+ // that need to be copied into vregs, emit the copies into the top of the
+ // block before emitting the code for the block.
+ MachineFunction &MF = DAG.getMachineFunction();
+ if (&MF.front() == BB && MF.livein_begin() != MF.livein_end()) {
+ for (MachineFunction::livein_iterator LI = MF.livein_begin(),
+ E = MF.livein_end(); LI != E; ++LI)
+ if (LI->second)
+ MRI->copyRegToReg(*MF.begin(), MF.begin()->end(), LI->second,
+ LI->first, RegMap->getRegClass(LI->second));
+ }
+
+
+ // Finally, emit the code for all of the scheduled instructions.
std::map<SDNode*, unsigned> VRBaseMap;
for (unsigned i = 0, e = Sequence.size(); i != e; i++) {
if (SUnit *SU = Sequence[i]) {
diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
index cc34d51..1cac134 100644
--- a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
+++ b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
@@ -3150,24 +3150,11 @@ LowerArguments(BasicBlock *BB, SelectionDAGLowering &SDL,
}
}
- // Next, if the function has live ins that need to be copied into vregs,
- // emit the copies now, into the top of the block.
- MachineFunction &MF = SDL.DAG.getMachineFunction();
- if (MF.livein_begin() != MF.livein_end()) {
- SSARegMap *RegMap = MF.getSSARegMap();
- const MRegisterInfo &MRI = *MF.getTarget().getRegisterInfo();
- for (MachineFunction::livein_iterator LI = MF.livein_begin(),
- E = MF.livein_end(); LI != E; ++LI)
- if (LI->second)
- MRI.copyRegToReg(*MF.begin(), MF.begin()->end(), LI->second,
- LI->first, RegMap->getRegClass(LI->second));
- }
-
// Finally, if the target has anything special to do, allow it to do so.
+ // FIXME: this should insert code into the DAG!
EmitFunctionEntryCode(F, SDL.DAG.getMachineFunction());
}
-
void SelectionDAGISel::BuildSelectionDAG(SelectionDAG &DAG, BasicBlock *LLVMBB,
std::vector<std::pair<MachineInstr*, unsigned> > &PHINodesToUpdate,
FunctionLoweringInfo &FuncInfo) {