Transform div to mul with reciprocal only when fp imm is legal.

This fixes PR12516 and uncovers one weird problem in legalize (workarounded)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154394 91177308-0d34-0410-b5e6-96231b3b80d8

1 files changed, 9 insertions, 2 deletions

diff --git a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index cf7ce58..b5b2028 100644
--- a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -5769,8 +5769,15 @@ SDValue DAGCombiner::visitFDIV(SDNode *N) {
     APFloat N1APF = N1CFP->getValueAPF();
     APFloat Recip(N1APF.getSemantics(), 1); // 1.0
     APFloat::opStatus st = Recip.divide(N1APF, APFloat::rmNearestTiesToEven);
-    // Only do the transform if the reciprocal is not too horrible (eg not NaN).
-    if (st == APFloat::opOK || st == APFloat::opInexact)
+    // Only do the transform if the reciprocal is not too horrible (eg not NaN)
+    // and the reciprocal is a legal fp imm.
+    if ((st == APFloat::opOK || st == APFloat::opInexact) &&
+        (!LegalOperations ||
+         // FIXME: custom lowering of ConstantFP might fail (see e.g. ARM
+         // backend)... we should handle this gracefully after Legalize.
+         // TLI.isOperationLegalOrCustom(llvm::ISD::ConstantFP, VT) ||
+         TLI.isOperationLegal(llvm::ISD::ConstantFP, VT) ||
+         TLI.isFPImmLegal(Recip, VT)))
       return DAG.getNode(ISD::FMUL, N->getDebugLoc(), VT, N0,
                          DAG.getConstantFP(Recip, VT));
   }