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author | Evan Cheng <evan.cheng@apple.com> | 2009-07-17 00:32:06 +0000 |
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committer | Evan Cheng <evan.cheng@apple.com> | 2009-07-17 00:32:06 +0000 |
commit | 9fc2d69858c807adfa4828900f8b0e78cd473adc (patch) | |
tree | e774c5c0dc10c9feff4ff5c2c92dfe2fb11bf3e6 /lib/CodeGen | |
parent | 4203c0866a6d4b5d0065e3d98ac8d161083954e7 (diff) | |
download | external_llvm-9fc2d69858c807adfa4828900f8b0e78cd473adc.zip external_llvm-9fc2d69858c807adfa4828900f8b0e78cd473adc.tar.gz external_llvm-9fc2d69858c807adfa4828900f8b0e78cd473adc.tar.bz2 |
Fix my brain cramp by inverting the assertion condition.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76131 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen')
-rw-r--r-- | lib/CodeGen/VirtRegRewriter.cpp | 4 |
1 files changed, 1 insertions, 3 deletions
diff --git a/lib/CodeGen/VirtRegRewriter.cpp b/lib/CodeGen/VirtRegRewriter.cpp index 2213c65..abaa8bd 100644 --- a/lib/CodeGen/VirtRegRewriter.cpp +++ b/lib/CodeGen/VirtRegRewriter.cpp @@ -491,13 +491,11 @@ static void ReMaterialize(MachineBasicBlock &MBB, const TargetRegisterInfo *TRI, VirtRegMap &VRM) { MachineInstr *ReMatDefMI = VRM.getReMaterializedMI(Reg); -#if 0 #ifndef NDEBUG const TargetInstrDesc &TID = ReMatDefMI->getDesc(); - assert(TID.getNumDefs() != 1 && + assert(TID.getNumDefs() == 1 && "Don't know how to remat instructions that define > 1 values!"); #endif -#endif TII->reMaterialize(MBB, MII, DestReg, ReMatDefMI->getOperand(0).getSubReg(), ReMatDefMI); MachineInstr *NewMI = prior(MII); |