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authorDale Johannesen <dalej@apple.com>2007-03-26 22:23:54 +0000
committerDale Johannesen <dalej@apple.com>2007-03-26 22:23:54 +0000
commitc6b9ef80a890fcf75f18cabc3fe2d5f9ef2faaf5 (patch)
tree16827a95984df7dc1050a871fc4f198b8ab0a6e9 /lib/CodeGen
parent0e5444bb208540d374c0422434986ad828ef0468 (diff)
downloadexternal_llvm-c6b9ef80a890fcf75f18cabc3fe2d5f9ef2faaf5.zip
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Fix reversed logic in getRegsUsed. Rename RegStates to RegsAvailable to
hopefully forestall similar errors. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35362 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen')
-rw-r--r--lib/CodeGen/RegisterScavenging.cpp30
1 files changed, 15 insertions, 15 deletions
diff --git a/lib/CodeGen/RegisterScavenging.cpp b/lib/CodeGen/RegisterScavenging.cpp
index e5729ab..0636863 100644
--- a/lib/CodeGen/RegisterScavenging.cpp
+++ b/lib/CodeGen/RegisterScavenging.cpp
@@ -36,7 +36,7 @@ void RegScavenger::enterBasicBlock(MachineBasicBlock *mbb) {
if (!MBB) {
NumPhysRegs = RegInfo->getNumRegs();
- RegStates.resize(NumPhysRegs);
+ RegsAvailable.resize(NumPhysRegs);
// Create reserved registers bitvector.
ReservedRegs = RegInfo->getReservedRegs(MF);
@@ -54,10 +54,10 @@ void RegScavenger::enterBasicBlock(MachineBasicBlock *mbb) {
ScavengedRC = NULL;
// All registers started out unused.
- RegStates.set();
+ RegsAvailable.set();
// Reserved registers are always used.
- RegStates ^= ReservedRegs;
+ RegsAvailable ^= ReservedRegs;
// Live-in registers are in use.
if (!MBB->livein_empty())
@@ -182,9 +182,9 @@ void RegScavenger::backward() {
void RegScavenger::getRegsUsed(BitVector &used, bool includeReserved) {
if (includeReserved)
- used = RegStates;
+ used = ~RegsAvailable;
else
- used = RegStates & ~ReservedRegs;
+ used = ~RegsAvailable & ~ReservedRegs;
}
/// CreateRegClassMask - Set the bits that represent the registers in the
@@ -198,32 +198,32 @@ static void CreateRegClassMask(const TargetRegisterClass *RC, BitVector &Mask) {
unsigned RegScavenger::FindUnusedReg(const TargetRegisterClass *RegClass,
const BitVector &Candidates) const {
// Mask off the registers which are not in the TargetRegisterClass.
- BitVector RegStatesCopy(NumPhysRegs, false);
- CreateRegClassMask(RegClass, RegStatesCopy);
- RegStatesCopy &= RegStates;
+ BitVector RegsAvailableCopy(NumPhysRegs, false);
+ CreateRegClassMask(RegClass, RegsAvailableCopy);
+ RegsAvailableCopy &= RegsAvailable;
// Restrict the search to candidates.
- RegStatesCopy &= Candidates;
+ RegsAvailableCopy &= Candidates;
// Returns the first unused (bit is set) register, or 0 is none is found.
- int Reg = RegStatesCopy.find_first();
+ int Reg = RegsAvailableCopy.find_first();
return (Reg == -1) ? 0 : Reg;
}
unsigned RegScavenger::FindUnusedReg(const TargetRegisterClass *RegClass,
bool ExCalleeSaved) const {
// Mask off the registers which are not in the TargetRegisterClass.
- BitVector RegStatesCopy(NumPhysRegs, false);
- CreateRegClassMask(RegClass, RegStatesCopy);
- RegStatesCopy &= RegStates;
+ BitVector RegsAvailableCopy(NumPhysRegs, false);
+ CreateRegClassMask(RegClass, RegsAvailableCopy);
+ RegsAvailableCopy &= RegsAvailable;
// If looking for a non-callee-saved register, mask off all the callee-saved
// registers.
if (ExCalleeSaved)
- RegStatesCopy &= ~CalleeSavedRegs;
+ RegsAvailableCopy &= ~CalleeSavedRegs;
// Returns the first unused (bit is set) register, or 0 is none is found.
- int Reg = RegStatesCopy.find_first();
+ int Reg = RegsAvailableCopy.find_first();
return (Reg == -1) ? 0 : Reg;
}