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author | Dan Gohman <gohman@apple.com> | 2008-08-21 17:55:02 +0000 |
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committer | Dan Gohman <gohman@apple.com> | 2008-08-21 17:55:02 +0000 |
commit | c8b20e2ce912e391766ba70e959e8a50ad020db8 (patch) | |
tree | 5afc7f75200b8b45f5e7ee1b7847371c1492223b /lib/CodeGen | |
parent | 747675ca64694761cfeb43aa6c38c5202267a630 (diff) | |
download | external_llvm-c8b20e2ce912e391766ba70e959e8a50ad020db8.zip external_llvm-c8b20e2ce912e391766ba70e959e8a50ad020db8.tar.gz external_llvm-c8b20e2ce912e391766ba70e959e8a50ad020db8.tar.bz2 |
Add libm-oriented ISD opcodes for rounding operations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55130 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen')
-rw-r--r-- | lib/CodeGen/SelectionDAG/LegalizeDAG.cpp | 5 | ||||
-rw-r--r-- | lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp | 10 | ||||
-rw-r--r-- | lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 5 |
3 files changed, 20 insertions, 0 deletions
diff --git a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp index 55cff68..a0e17d5 100644 --- a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp +++ b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp @@ -3493,6 +3493,11 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) { case ISD::FSQRT: case ISD::FSIN: case ISD::FCOS: + case ISD::FTRUNC: + case ISD::FFLOOR: + case ISD::FCEIL: + case ISD::FRINT: + case ISD::FNEARBYINT: Tmp1 = LegalizeOp(Node->getOperand(0)); switch (TLI.getOperationAction(Node->getOpcode(), Node->getValueType(0))) { case TargetLowering::Promote: diff --git a/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp b/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp index 9275fc2..d0d1e39 100644 --- a/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp +++ b/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp @@ -61,6 +61,11 @@ void DAGTypeLegalizer::ScalarizeVectorResult(SDNode *N, unsigned ResNo) { case ISD::FP_TO_UINT: case ISD::FSIN: case ISD::FSQRT: + case ISD::FTRUNC: + case ISD::FFLOOR: + case ISD::FCEIL: + case ISD::FRINT: + case ISD::FNEARBYINT: case ISD::SINT_TO_FP: case ISD::UINT_TO_FP: R = ScalarizeVecRes_UnaryOp(N); break; @@ -298,6 +303,11 @@ void DAGTypeLegalizer::SplitVectorResult(SDNode *N, unsigned ResNo) { case ISD::FSQRT: case ISD::FSIN: case ISD::FCOS: + case ISD::FTRUNC: + case ISD::FFLOOR: + case ISD::FCEIL: + case ISD::FRINT: + case ISD::FNEARBYINT: case ISD::FP_TO_SINT: case ISD::FP_TO_UINT: case ISD::SINT_TO_FP: diff --git a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp index 74d6a2a..2167656 100644 --- a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp +++ b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp @@ -4771,6 +4771,11 @@ std::string SDNode::getOperationName(const SelectionDAG *G) const { case ISD::FCOS: return "fcos"; case ISD::FPOWI: return "fpowi"; case ISD::FPOW: return "fpow"; + case ISD::FTRUNC: return "ftrunc"; + case ISD::FFLOOR: return "ffloor"; + case ISD::FCEIL: return "fceil"; + case ISD::FRINT: return "frint"; + case ISD::FNEARBYINT: return "fnearbyint"; // Binary operators case ISD::ADD: return "add"; |