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authorVikram S. Adve <vadve@cs.uiuc.edu>2001-11-12 23:40:22 +0000
committerVikram S. Adve <vadve@cs.uiuc.edu>2001-11-12 23:40:22 +0000
commite85f2332dbdd7ed50635b9095d021b086d26f488 (patch)
treee9e769ae20ae39c2e30876264ee59c3b578ab7b8 /lib/CodeGen
parent00521d79bf4ee009f59e726a5eb227e04075f5c8 (diff)
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Do the same for allocating spills to get their alignment right too.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@1285 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen')
-rw-r--r--lib/CodeGen/RegAlloc/PhyRegAlloc.cpp3
1 files changed, 2 insertions, 1 deletions
diff --git a/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp b/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp
index 9133da5..0acdcdb 100644
--- a/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp
+++ b/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp
@@ -1036,7 +1036,8 @@ void PhyRegAlloc::allocateStackSpace4SpilledLRs()
LiveRange *L = (*HMI).second; // get the LiveRange
if(L)
if( ! L->hasColor() )
- L->setSpillOffFromFP(mcInfo.allocateSpilledValue(TM,L->getType()));
+ /**** NOTE: THIS SHOULD USE THE RIGHT SIZE FOR THE REG BEING PUSHED ****/
+ L->setSpillOffFromFP(mcInfo.allocateSpilledValue(TM, Type::LongTy /*L->getType()*/ ));
}
} // for all LR's in hash map
}