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author | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2010-06-22 22:11:07 +0000 |
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committer | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2010-06-22 22:11:07 +0000 |
commit | f175c5c82891f0f68807d8b88020cd2a3a9cdbf6 (patch) | |
tree | 74dab4feab54ba9e7fe34bcf715e52c97d40df17 /lib/CodeGen | |
parent | a3a204664db165f7b58a45e2239127513b207e8f (diff) | |
download | external_llvm-f175c5c82891f0f68807d8b88020cd2a3a9cdbf6.zip external_llvm-f175c5c82891f0f68807d8b88020cd2a3a9cdbf6.tar.gz external_llvm-f175c5c82891f0f68807d8b88020cd2a3a9cdbf6.tar.bz2 |
Also convert SUBREG_TO_REG to a KILL when relevant, like the other subreg
instructions.
This does not affect codegen much because SUBREG_TO_REG is only used by X86 and
X86 does not use the register scavenger, but it prevents verifier errors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106583 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen')
-rw-r--r-- | lib/CodeGen/LowerSubregs.cpp | 19 |
1 files changed, 12 insertions, 7 deletions
diff --git a/lib/CodeGen/LowerSubregs.cpp b/lib/CodeGen/LowerSubregs.cpp index b0348a5..78d8de4 100644 --- a/lib/CodeGen/LowerSubregs.cpp +++ b/lib/CodeGen/LowerSubregs.cpp @@ -166,10 +166,10 @@ bool LowerSubregsInstructionPass::LowerSubregToReg(MachineInstr *MI) { MI->getOperand(1).isImm() && (MI->getOperand(2).isReg() && MI->getOperand(2).isUse()) && MI->getOperand(3).isImm() && "Invalid subreg_to_reg"); - + unsigned DstReg = MI->getOperand(0).getReg(); unsigned InsReg = MI->getOperand(2).getReg(); - unsigned InsSIdx = MI->getOperand(2).getSubReg(); + assert(!MI->getOperand(2).getSubReg() && "SubIdx on physreg?"); unsigned SubIdx = MI->getOperand(3).getImm(); assert(SubIdx != 0 && "Invalid index for insert_subreg"); @@ -182,13 +182,18 @@ bool LowerSubregsInstructionPass::LowerSubregToReg(MachineInstr *MI) { DEBUG(dbgs() << "subreg: CONVERTING: " << *MI); - if (DstSubReg == InsReg && InsSIdx == 0) { + if (DstSubReg == InsReg) { // No need to insert an identify copy instruction. // Watch out for case like this: - // %RAX<def> = ... - // %RAX<def> = SUBREG_TO_REG 0, %EAX:3<kill>, 3 - // The first def is defining RAX, not EAX so the top bits were not - // zero extended. + // %RAX<def> = SUBREG_TO_REG 0, %EAX<kill>, 3 + // We must leave %RAX live. + if (DstReg != InsReg) { + MI->setDesc(TII->get(TargetOpcode::KILL)); + MI->RemoveOperand(3); // SubIdx + MI->RemoveOperand(1); // Imm + DEBUG(dbgs() << "subreg: replace by: " << *MI); + return true; + } DEBUG(dbgs() << "subreg: eliminated!"); } else { // Insert sub-register copy |