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authorEvan Cheng <evan.cheng@apple.com>2008-04-03 16:40:27 +0000
committerEvan Cheng <evan.cheng@apple.com>2008-04-03 16:40:27 +0000
commitf30a49d9e02bdf9ba9703f8f1f52a3c6186e0065 (patch)
tree3de449c33d489d5d4cd4b76cdbe0afc50bd49e43 /lib/CodeGen
parent419852ca8a01aecde4c0e20af6b7bd6450e70f87 (diff)
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Special handling of zero-sized live intervals.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49167 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen')
-rw-r--r--lib/CodeGen/RegAllocLinearScan.cpp24
1 files changed, 19 insertions, 5 deletions
diff --git a/lib/CodeGen/RegAllocLinearScan.cpp b/lib/CodeGen/RegAllocLinearScan.cpp
index 6925de3..19c7da1 100644
--- a/lib/CodeGen/RegAllocLinearScan.cpp
+++ b/lib/CodeGen/RegAllocLinearScan.cpp
@@ -322,11 +322,13 @@ void RALinScan::linearScan()
++NumIters;
DOUT << "\n*** CURRENT ***: " << *cur << '\n';
- processActiveIntervals(cur->beginNumber());
- processInactiveIntervals(cur->beginNumber());
+ if (!cur->empty()) {
+ processActiveIntervals(cur->beginNumber());
+ processInactiveIntervals(cur->beginNumber());
- assert(TargetRegisterInfo::isVirtualRegister(cur->reg) &&
- "Can only allocate virtual registers!");
+ assert(TargetRegisterInfo::isVirtualRegister(cur->reg) &&
+ "Can only allocate virtual registers!");
+ }
// Allocating a virtual register. try to find a free
// physical register or spill an interval (possibly this one) in order to
@@ -508,11 +510,23 @@ void RALinScan::assignRegOrStackSlotAtInterval(LiveInterval* cur)
{
DOUT << "\tallocating current interval: ";
+ // This is an implicitly defined live interval, just assign any register.
+ const TargetRegisterClass *RC = reginfo_->getRegClass(cur->reg);
+ if (cur->empty()) {
+ unsigned physReg = cur->preference;
+ if (!physReg)
+ physReg = *RC->allocation_order_begin(*mf_);
+ DOUT << tri_->getName(physReg) << '\n';
+ // Note the register is not really in use.
+ vrm_->assignVirt2Phys(cur->reg, physReg);
+ handled_.push_back(cur);
+ return;
+ }
+
PhysRegTracker backupPrt = *prt_;
std::vector<std::pair<unsigned, float> > SpillWeightsToAdd;
unsigned StartPosition = cur->beginNumber();
- const TargetRegisterClass *RC = reginfo_->getRegClass(cur->reg);
const TargetRegisterClass *RCLeader = RelatedRegClasses.getLeaderValue(RC);
// If this live interval is defined by a move instruction and its source is