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authorChris Lattner <sabre@nondot.org>2003-04-22 20:34:47 +0000
committerChris Lattner <sabre@nondot.org>2003-04-22 20:34:47 +0000
commit09e9392d636c7f28ccb346d7dbf83d45f28fad9a (patch)
tree7fa3b2f37b19cfe44b86376f9b26ed54ceed3a31 /lib/ExecutionEngine
parent7a5a1f790f7a3912a9963c11f720b37ebb65056a (diff)
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Add support to LLI for switch instruction
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5851 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/ExecutionEngine')
-rw-r--r--lib/ExecutionEngine/Interpreter/Execution.cpp22
1 files changed, 22 insertions, 0 deletions
diff --git a/lib/ExecutionEngine/Interpreter/Execution.cpp b/lib/ExecutionEngine/Interpreter/Execution.cpp
index ff62ac8..6b872fb 100644
--- a/lib/ExecutionEngine/Interpreter/Execution.cpp
+++ b/lib/ExecutionEngine/Interpreter/Execution.cpp
@@ -635,6 +635,27 @@ void Interpreter::executeBrInst(BranchInst &I, ExecutionContext &SF) {
SF.CurInst = SF.CurBB->begin(); // Update new instruction ptr...
}
+static void executeSwitch(SwitchInst &I, ExecutionContext &SF) {
+ GenericValue CondVal = getOperandValue(I.getOperand(0), SF);
+ const Type *ElTy = I.getOperand(0)->getType();
+ SF.PrevBB = SF.CurBB; // Update PrevBB so that PHI nodes work...
+ BasicBlock *Dest = 0;
+
+ // Check to see if any of the cases match...
+ for (unsigned i = 2, e = I.getNumOperands(); i != e; i += 2) {
+ if (executeSetEQInst(CondVal,
+ getOperandValue(I.getOperand(i), SF),ElTy,SF).BoolVal){
+ Dest = cast<BasicBlock>(I.getOperand(i+1));
+ break;
+ }
+ }
+
+ if (!Dest) Dest = I.getDefaultDest(); // No cases matched: use default
+ SF.CurBB = Dest; // Update CurBB to branch destination
+ SF.CurInst = SF.CurBB->begin(); // Update new instruction ptr...
+}
+
+
//===----------------------------------------------------------------------===//
// Memory Instruction Implementations
//===----------------------------------------------------------------------===//
@@ -1106,6 +1127,7 @@ bool Interpreter::executeInstruction() {
// Terminators
case Instruction::Ret: executeRetInst (cast<ReturnInst>(I), SF); break;
case Instruction::Br: executeBrInst (cast<BranchInst>(I), SF); break;
+ case Instruction::Switch: executeSwitch (cast<SwitchInst>(I), SF); break;
// Memory Instructions
case Instruction::Alloca:
case Instruction::Malloc: executeAllocInst((AllocationInst&)I, SF); break;