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authorEvan Cheng <evan.cheng@apple.com>2011-07-01 20:45:01 +0000
committerEvan Cheng <evan.cheng@apple.com>2011-07-01 20:45:01 +0000
commit94214703d97d8d9dfca88174ffc7e94820a85e62 (patch)
tree92edaa7cf8adfab8d915bdb21eb1d78267faee4e /lib/MC/MCSubtargetInfo.cpp
parenteb03c3b22861e5fb6459aa055378e852df29b621 (diff)
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- Added MCSubtargetInfo to capture subtarget features and scheduling
itineraries. - Refactor TargetSubtarget to be based on MCSubtargetInfo. - Change tablegen generated subtarget info to initialize MCSubtargetInfo and hide more details from targets. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134257 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/MC/MCSubtargetInfo.cpp')
-rw-r--r--lib/MC/MCSubtargetInfo.cpp44
1 files changed, 44 insertions, 0 deletions
diff --git a/lib/MC/MCSubtargetInfo.cpp b/lib/MC/MCSubtargetInfo.cpp
new file mode 100644
index 0000000..c401b7e
--- /dev/null
+++ b/lib/MC/MCSubtargetInfo.cpp
@@ -0,0 +1,44 @@
+//===-- MCSubtargetInfo.cpp - Subtarget Information -----------------------===//
+//
+// The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+
+#include "llvm/MC/MCSubtargetInfo.h"
+#include "llvm/MC/MCInstrItineraries.h"
+#include "llvm/MC/SubtargetFeature.h"
+#include "llvm/ADT/StringRef.h"
+#include "llvm/Support/raw_ostream.h"
+#include <algorithm>
+
+using namespace llvm;
+
+InstrItineraryData
+MCSubtargetInfo::getInstrItineraryForCPU(StringRef CPU) const {
+ assert(ProcItins && "Instruction itineraries information not available!");
+
+#ifndef NDEBUG
+ for (size_t i = 1; i < NumProcs; i++) {
+ assert(strcmp(ProcItins[i - 1].Key, ProcItins[i].Key) < 0 &&
+ "Itineraries table is not sorted");
+ }
+#endif
+
+ // Find entry
+ SubtargetInfoKV KV;
+ KV.Key = CPU.data();
+ const SubtargetInfoKV *Found =
+ std::lower_bound(ProcItins, ProcItins+NumProcs, KV);
+ if (Found == ProcItins+NumProcs || StringRef(Found->Key) != CPU) {
+ errs() << "'" << CPU
+ << "' is not a recognized processor for this target"
+ << " (ignoring processor)\n";
+ return InstrItineraryData();
+ }
+
+ return InstrItineraryData(Stages, OperandCycles, ForwardingPathes,
+ (InstrItinerary *)Found->Value);
+}