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| author | Richard Sandiford <rsandifo@linux.vnet.ibm.com> | 2013-07-12 09:17:10 +0000 |
|---|---|---|
| committer | Richard Sandiford <rsandifo@linux.vnet.ibm.com> | 2013-07-12 09:17:10 +0000 |
| commit | 9bcad42c3aadab118b6ed5f30f2ea0d87228fd3f (patch) | |
| tree | cd0355356c13a1e429b7606f35dfa9851f90899c /lib/Object | |
| parent | 5e009541973b7935386055066689902aa7134e2d (diff) | |
| download | external_llvm-9bcad42c3aadab118b6ed5f30f2ea0d87228fd3f.zip external_llvm-9bcad42c3aadab118b6ed5f30f2ea0d87228fd3f.tar.gz external_llvm-9bcad42c3aadab118b6ed5f30f2ea0d87228fd3f.tar.bz2 | |
[SystemZ] Optimize sign-extends of vector setccs
Normal (sext (setcc ...)) sequences are optimised into
(select_cc ..., -1, 0) by DAGCombiner::visitSIGN_EXTEND.
However, this is deliberately not done for vectors, and after
vector type legalization we have (sext_inreg (setcc ...)) instead.
I wondered about trying to extend DAGCombiner to handle this case too,
but it seemed to be a loss on some other targets I tried, even those for
which SETCC isn't "legal" and SELECT_CC is.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186149 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Object')
0 files changed, 0 insertions, 0 deletions