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authorAaron Ballman <aaron@aaronballman.com>2013-04-03 18:00:22 +0000
committerAaron Ballman <aaron@aaronballman.com>2013-04-03 18:00:22 +0000
commitb31b099a3722ad5b5d94ffe862ee92df51565b51 (patch)
tree82713f2e87a3303f7ba4ede71157f35dc1f357de /lib/Support/Host.cpp
parent63c32a7a9fd30f67bc623c818f434e742d43c085 (diff)
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Ensuring that both bits are set, and not just a combination of one or the other.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178674 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Support/Host.cpp')
-rw-r--r--lib/Support/Host.cpp3
1 files changed, 2 insertions, 1 deletions
diff --git a/lib/Support/Host.cpp b/lib/Support/Host.cpp
index fef66e6..73d98d1 100644
--- a/lib/Support/Host.cpp
+++ b/lib/Support/Host.cpp
@@ -152,7 +152,8 @@ std::string sys::getHostCPUName() {
// If CPUID indicates support for XSAVE, XRESTORE and AVX, and XGETBV
// indicates that the AVX registers will be saved and restored on context
// switch, then we have full AVX support.
- bool HasAVX = (ECX & ((1 << 28) | (1 << 27))) != 0 && OSHasAVXSupport();
+ const unsigned AVXBits = (1 << 27) | (1 << 28);
+ bool HasAVX = ((ECX & AVXBits) == AVXBits) && OSHasAVXSupport();
GetX86CpuIDAndInfo(0x80000001, &EAX, &EBX, &ECX, &EDX);
bool Em64T = (EDX >> 29) & 0x1;