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authorBenjamin Kramer <benny.kra@googlemail.com>2013-07-29 11:02:08 +0000
committerBenjamin Kramer <benny.kra@googlemail.com>2013-07-29 11:02:08 +0000
commit9e036910f87570bce83a5bb3457b689a05868846 (patch)
treeca8e7814631bd717116bcc3c85c151b1aea852c7 /lib/Support
parentfd79485dfa4fee67467299720efac2d0c21d846c (diff)
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Some Intel Penryn CPUs come with SSE4 disabled. Detect them as core 2.
PR16721. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187350 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Support')
-rw-r--r--lib/Support/Host.cpp4
1 files changed, 3 insertions, 1 deletions
diff --git a/lib/Support/Host.cpp b/lib/Support/Host.cpp
index 40e7a49..90e4389 100644
--- a/lib/Support/Host.cpp
+++ b/lib/Support/Host.cpp
@@ -149,6 +149,7 @@ std::string sys::getHostCPUName() {
DetectX86FamilyModel(EAX, Family, Model);
bool HasSSE3 = (ECX & 0x1);
+ bool HasSSE41 = (ECX & 0x80000);
// If CPUID indicates support for XSAVE, XRESTORE and AVX, and XGETBV
// indicates that the AVX registers will be saved and restored on context
// switch, then we have full AVX support.
@@ -244,7 +245,8 @@ std::string sys::getHostCPUName() {
// 17h. All processors are manufactured using the 45 nm process.
//
// 45nm: Penryn , Wolfdale, Yorkfield (XE)
- return "penryn";
+ // Not all Penryn processors support SSE 4.1 (such as the Pentium brand)
+ return HasSSE41 ? "penryn" : "core2";
case 26: // Intel Core i7 processor and Intel Xeon processor. All
// processors are manufactured using the 45 nm process.