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| author | Stephen Hines <srhines@google.com> | 2014-12-01 14:51:49 -0800 |
|---|---|---|
| committer | Stephen Hines <srhines@google.com> | 2014-12-02 16:08:10 -0800 |
| commit | 37ed9c199ca639565f6ce88105f9e39e898d82d0 (patch) | |
| tree | 8fb36d3910e3ee4c4e1b7422f4f017108efc52f5 /lib/Target/AArch64/AArch64AdvSIMDScalarPass.cpp | |
| parent | d2327b22152ced7bc46dc629fc908959e8a52d03 (diff) | |
| download | external_llvm-37ed9c199ca639565f6ce88105f9e39e898d82d0.zip external_llvm-37ed9c199ca639565f6ce88105f9e39e898d82d0.tar.gz external_llvm-37ed9c199ca639565f6ce88105f9e39e898d82d0.tar.bz2 | |
Update aosp/master LLVM for rebase to r222494.
Change-Id: Ic787f5e0124df789bd26f3f24680f45e678eef2d
Diffstat (limited to 'lib/Target/AArch64/AArch64AdvSIMDScalarPass.cpp')
| -rw-r--r-- | lib/Target/AArch64/AArch64AdvSIMDScalarPass.cpp | 12 |
1 files changed, 10 insertions, 2 deletions
diff --git a/lib/Target/AArch64/AArch64AdvSIMDScalarPass.cpp b/lib/Target/AArch64/AArch64AdvSIMDScalarPass.cpp index 734fb21..5afe0f4 100644 --- a/lib/Target/AArch64/AArch64AdvSIMDScalarPass.cpp +++ b/lib/Target/AArch64/AArch64AdvSIMDScalarPass.cpp @@ -36,9 +36,10 @@ #include "AArch64.h" #include "AArch64InstrInfo.h" #include "AArch64RegisterInfo.h" +#include "AArch64Subtarget.h" #include "llvm/ADT/Statistic.h" -#include "llvm/CodeGen/MachineFunctionPass.h" #include "llvm/CodeGen/MachineFunction.h" +#include "llvm/CodeGen/MachineFunctionPass.h" #include "llvm/CodeGen/MachineInstr.h" #include "llvm/CodeGen/MachineInstrBuilder.h" #include "llvm/CodeGen/MachineRegisterInfo.h" @@ -166,6 +167,12 @@ static int getTransformOpcode(unsigned Opc) { return AArch64::ADDv1i64; case AArch64::SUBXrr: return AArch64::SUBv1i64; + case AArch64::ANDXrr: + return AArch64::ANDv8i8; + case AArch64::EORXrr: + return AArch64::EORv8i8; + case AArch64::ORRXrr: + return AArch64::ORRv8i8; } // No AdvSIMD equivalent, so just return the original opcode. return Opc; @@ -371,7 +378,8 @@ bool AArch64AdvSIMDScalar::runOnMachineFunction(MachineFunction &mf) { const TargetMachine &TM = mf.getTarget(); MRI = &mf.getRegInfo(); - TII = static_cast<const AArch64InstrInfo *>(TM.getInstrInfo()); + TII = static_cast<const AArch64InstrInfo *>( + TM.getSubtargetImpl()->getInstrInfo()); // Just check things on a one-block-at-a-time basis. for (MachineFunction::iterator I = mf.begin(), E = mf.end(); I != E; ++I) |