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| author | Tim Northover <Tim.Northover@arm.com> | 2013-02-28 14:46:14 +0000 |
|---|---|---|
| committer | Tim Northover <Tim.Northover@arm.com> | 2013-02-28 14:46:14 +0000 |
| commit | 54a1cf75d2b32cd96ec78f61af5c1bed8d81524d (patch) | |
| tree | 8c679b60ee8b3fa1b526075814f9540fae2b1d0e /lib/Target/AArch64/MCTargetDesc | |
| parent | 6ff20f205b2aa126b268bcada9920f56715161be (diff) | |
| download | external_llvm-54a1cf75d2b32cd96ec78f61af5c1bed8d81524d.zip external_llvm-54a1cf75d2b32cd96ec78f61af5c1bed8d81524d.tar.gz external_llvm-54a1cf75d2b32cd96ec78f61af5c1bed8d81524d.tar.bz2 | |
AArch64: remove post-encoder method from FCMP (immediate) instructions.
The work done by the post-encoder (setting architecturally unused bits to 0 as
required) can be done by the existing operand that covers the "#0.0". This
removes at least one use of the discouraged PostEncoderMethod uses.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176261 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/AArch64/MCTargetDesc')
| -rw-r--r-- | lib/Target/AArch64/MCTargetDesc/AArch64MCCodeEmitter.cpp | 11 |
1 files changed, 0 insertions, 11 deletions
diff --git a/lib/Target/AArch64/MCTargetDesc/AArch64MCCodeEmitter.cpp b/lib/Target/AArch64/MCTargetDesc/AArch64MCCodeEmitter.cpp index 756e037..a5c591e 100644 --- a/lib/Target/AArch64/MCTargetDesc/AArch64MCCodeEmitter.cpp +++ b/lib/Target/AArch64/MCTargetDesc/AArch64MCCodeEmitter.cpp @@ -106,8 +106,6 @@ public: void EncodeInstruction(const MCInst &MI, raw_ostream &OS, SmallVectorImpl<MCFixup> &Fixups) const; - unsigned fixFCMPImm(const MCInst &MI, unsigned EncodedValue) const; - template<int hasRs, int hasRt2> unsigned fixLoadStoreExclusive(const MCInst &MI, unsigned EncodedValue) const; @@ -423,15 +421,6 @@ AArch64MCCodeEmitter::getMoveWideImmOpValue(const MCInst &MI, unsigned OpIdx, return Result | getAddressWithFixup(UImm16MO, requestedFixup, Fixups); } -unsigned AArch64MCCodeEmitter::fixFCMPImm(const MCInst &MI, - unsigned EncodedValue) const { - // For FCMP[E] Rn, #0.0, the Rm field has a canonical representation - // with 0s, but is architecturally ignored - EncodedValue &= ~0x1f0000u; - - return EncodedValue; -} - template<int hasRs, int hasRt2> unsigned AArch64MCCodeEmitter::fixLoadStoreExclusive(const MCInst &MI, unsigned EncodedValue) const { |