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author | Tim Northover <Tim.Northover@arm.com> | 2013-02-11 12:32:18 +0000 |
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committer | Tim Northover <Tim.Northover@arm.com> | 2013-02-11 12:32:18 +0000 |
commit | 77b1c9cf57849b3f9a4e8bae47cd5954d20a7e11 (patch) | |
tree | 078bb96122ebe10ecbb57407697279441f900ef1 /lib/Target/AArch64 | |
parent | b05dc5546062f29bf08837db8f680879aa1c14cf (diff) | |
download | external_llvm-77b1c9cf57849b3f9a4e8bae47cd5954d20a7e11.zip external_llvm-77b1c9cf57849b3f9a4e8bae47cd5954d20a7e11.tar.gz external_llvm-77b1c9cf57849b3f9a4e8bae47cd5954d20a7e11.tar.bz2 |
AArch64: Simplify logic in deciding whether bfi is valid
Previous code had a confusing comment which was mostly an implementation
detail. This condition corresponds to "lsb up to register width" and "width not
ridiculous".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174877 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/AArch64')
-rw-r--r-- | lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp | 7 |
1 files changed, 1 insertions, 6 deletions
diff --git a/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp b/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp index bab7d84..1cdeafb 100644 --- a/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp +++ b/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp @@ -1725,12 +1725,7 @@ validateInstruction(MCInst &Inst, int64_t ImmR = Inst.getOperand(ImmOps).getImm(); int64_t ImmS = Inst.getOperand(ImmOps+1).getImm(); - if (ImmR == 0) { - // Bitfield inserts are preferred disassembly if ImmS < ImmR. However, - // there is this one case where insert is valid syntax but the bfx - // disassembly should be used: e.g. "sbfiz w0, w0, #0, #1". - return false; - } else if (ImmS >= ImmR) { + if (ImmR != 0 && ImmS >= ImmR) { return Error(Operands[4]->getStartLoc(), "requested insert overflows register"); } |