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authorChad Rosier <mcrosier@apple.com>2011-11-07 21:43:40 +0000
committerChad Rosier <mcrosier@apple.com>2011-11-07 21:43:40 +0000
commit62c8e8e3f65a2943cedbce37a6b9b47653f0ea0a (patch)
treec7b93fdd8e4ac4816ab753dbc6c27186e9e0a62c /lib/Target/ARM/ARMCallingConv.td
parent25265d0e7af83f30e64851458c29c5b0c01befeb (diff)
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Allow i1 to be promoted to i32 for ARM AAPCS and AAPCS-VFP calling convention as well.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144021 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/ARMCallingConv.td')
-rw-r--r--lib/Target/ARM/ARMCallingConv.td2
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/Target/ARM/ARMCallingConv.td b/lib/Target/ARM/ARMCallingConv.td
index 5539d28..a482a20 100644
--- a/lib/Target/ARM/ARMCallingConv.td
+++ b/lib/Target/ARM/ARMCallingConv.td
@@ -89,7 +89,7 @@ def RetFastCC_ARM_APCS : CallingConv<[
def CC_ARM_AAPCS_Common : CallingConv<[
- CCIfType<[i8, i16], CCPromoteToType<i32>>,
+ CCIfType<[i1, i8, i16], CCPromoteToType<i32>>,
// i64/f64 is passed in even pairs of GPRs
// i64 is 8-aligned i32 here, so we may need to eat R1 as a pad register