aboutsummaryrefslogtreecommitdiffstats
path: root/lib/Target/ARM/ARMCodeEmitter.cpp
diff options
context:
space:
mode:
authorShih-wei Liao <sliao@google.com>2012-08-03 00:11:18 -0700
committerShih-wei Liao <sliao@google.com>2012-08-03 00:11:18 -0700
commit7744acd1ab73b3eec6f1449f47083abe3fb1b527 (patch)
tree17ef28b6d1034fdea7f42a19bebe7ad834901d62 /lib/Target/ARM/ARMCodeEmitter.cpp
parent4a05ed708aed4c7a099d924ed3feb604d3e44074 (diff)
parenta94d6e87c4c49f2e81b01d66d8bfb591277f8f96 (diff)
downloadexternal_llvm-7744acd1ab73b3eec6f1449f47083abe3fb1b527.zip
external_llvm-7744acd1ab73b3eec6f1449f47083abe3fb1b527.tar.gz
external_llvm-7744acd1ab73b3eec6f1449f47083abe3fb1b527.tar.bz2
Merge with LLVM upstream r160668 (Jul 24th 2012)
Conflicts: include/llvm/Support/ELF.h lib/CodeGen/AsmPrinter/AsmPrinter.cpp lib/Support/Memory.cpp lib/Transforms/Instrumentation/AddressSanitizer.cpp Change-Id: Iddd658cf2eadc7165b2805b446d31af2c5c9917f
Diffstat (limited to 'lib/Target/ARM/ARMCodeEmitter.cpp')
-rw-r--r--lib/Target/ARM/ARMCodeEmitter.cpp6
1 files changed, 3 insertions, 3 deletions
diff --git a/lib/Target/ARM/ARMCodeEmitter.cpp b/lib/Target/ARM/ARMCodeEmitter.cpp
index bc681be..b8627a2 100644
--- a/lib/Target/ARM/ARMCodeEmitter.cpp
+++ b/lib/Target/ARM/ARMCodeEmitter.cpp
@@ -1648,7 +1648,7 @@ void ARMCodeEmitter::emitMiscBranchInstruction(const MachineInstr &MI) {
static unsigned encodeVFPRd(const MachineInstr &MI, unsigned OpIdx) {
unsigned RegD = MI.getOperand(OpIdx).getReg();
unsigned Binary = 0;
- bool isSPVFP = ARM::SPRRegisterClass->contains(RegD);
+ bool isSPVFP = ARM::SPRRegClass.contains(RegD);
RegD = getARMRegisterNumbering(RegD);
if (!isSPVFP) {
Binary |= (RegD & 0x0F) << ARMII::RegRdShift;
@@ -1663,7 +1663,7 @@ static unsigned encodeVFPRd(const MachineInstr &MI, unsigned OpIdx) {
static unsigned encodeVFPRn(const MachineInstr &MI, unsigned OpIdx) {
unsigned RegN = MI.getOperand(OpIdx).getReg();
unsigned Binary = 0;
- bool isSPVFP = ARM::SPRRegisterClass->contains(RegN);
+ bool isSPVFP = ARM::SPRRegClass.contains(RegN);
RegN = getARMRegisterNumbering(RegN);
if (!isSPVFP) {
Binary |= (RegN & 0x0F) << ARMII::RegRnShift;
@@ -1678,7 +1678,7 @@ static unsigned encodeVFPRn(const MachineInstr &MI, unsigned OpIdx) {
static unsigned encodeVFPRm(const MachineInstr &MI, unsigned OpIdx) {
unsigned RegM = MI.getOperand(OpIdx).getReg();
unsigned Binary = 0;
- bool isSPVFP = ARM::SPRRegisterClass->contains(RegM);
+ bool isSPVFP = ARM::SPRRegClass.contains(RegM);
RegM = getARMRegisterNumbering(RegM);
if (!isSPVFP) {
Binary |= (RegM & 0x0F);