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authorEric Christopher <echristo@apple.com>2010-09-28 00:35:09 +0000
committerEric Christopher <echristo@apple.com>2010-09-28 00:35:09 +0000
commit7194838a9d1f7770c9bf905ea1fa3eef49adcf99 (patch)
treeaa06a5cbf45b918c2b520562c30ea98e66f44094 /lib/Target/ARM/ARMFastISel.cpp
parentba6c6eb572dcc63b1aac4b487057f2f2e492deec (diff)
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Fix fp constant loads to have a destination register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114930 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/ARMFastISel.cpp')
-rw-r--r--lib/Target/ARM/ARMFastISel.cpp5
1 files changed, 3 insertions, 2 deletions
diff --git a/lib/Target/ARM/ARMFastISel.cpp b/lib/Target/ARM/ARMFastISel.cpp
index e84989c..eb27fad 100644
--- a/lib/Target/ARM/ARMFastISel.cpp
+++ b/lib/Target/ARM/ARMFastISel.cpp
@@ -397,8 +397,9 @@ unsigned ARMFastISel::ARMMaterializeFP(const ConstantFP *CFP, EVT VT) {
unsigned Opc = is64bit ? ARM::VLDRD : ARM::VLDRS;
// The extra reg is for addrmode5.
- AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(Opc))
- .addReg(DestReg).addConstantPoolIndex(Idx)
+ AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(Opc),
+ DestReg)
+ .addConstantPoolIndex(Idx)
.addReg(0));
return DestReg;
}