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author | Evan Cheng <evan.cheng@apple.com> | 2008-08-29 06:41:12 +0000 |
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committer | Evan Cheng <evan.cheng@apple.com> | 2008-08-29 06:41:12 +0000 |
commit | 34a46e1e09fadd67db9262f355af697c29a14cbc (patch) | |
tree | d3534ed5fe69d7811afce4ee1984a14119cd8055 /lib/Target/ARM/ARMInstrFormats.td | |
parent | 812d90bbe5c736c07908a622984a1d2c54677c17 (diff) | |
download | external_llvm-34a46e1e09fadd67db9262f355af697c29a14cbc.zip external_llvm-34a46e1e09fadd67db9262f355af697c29a14cbc.tar.gz external_llvm-34a46e1e09fadd67db9262f355af697c29a14cbc.tar.bz2 |
More refactoring.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55528 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/ARMInstrFormats.td')
-rw-r--r-- | lib/Target/ARM/ARMInstrFormats.td | 55 |
1 files changed, 55 insertions, 0 deletions
diff --git a/lib/Target/ARM/ARMInstrFormats.td b/lib/Target/ARM/ARMInstrFormats.td index b1a7715..9ea6157 100644 --- a/lib/Target/ARM/ARMInstrFormats.td +++ b/lib/Target/ARM/ARMInstrFormats.td @@ -226,3 +226,58 @@ class ARMV5TEPat<dag pattern, dag result> : Pat<pattern, result> { class ARMV6Pat<dag pattern, dag result> : Pat<pattern, result> { list<Predicate> Predicates = [IsARM, HasV6]; } + +//===----------------------------------------------------------------------===// +// +// Thumb Instruction Format Definitions. +// + + +// TI - Thumb instruction. + +class ThumbI<dag outs, dag ins, AddrMode am, SizeFlagVal sz, + string asm, string cstr, list<dag> pattern> + // FIXME: Set all opcodes to 0 for now. + : InstARM<0, am, sz, IndexModeNone, ThumbFrm, cstr> { + let OutOperandList = outs; + let InOperandList = ins; + let AsmString = asm; + let Pattern = pattern; + list<Predicate> Predicates = [IsThumb]; +} + +class TI<dag outs, dag ins, string asm, list<dag> pattern> + : ThumbI<outs, ins, AddrModeNone, Size2Bytes, asm, "", pattern>; +class TI1<dag outs, dag ins, string asm, list<dag> pattern> + : ThumbI<outs, ins, AddrModeT1, Size2Bytes, asm, "", pattern>; +class TI2<dag outs, dag ins, string asm, list<dag> pattern> + : ThumbI<outs, ins, AddrModeT2, Size2Bytes, asm, "", pattern>; +class TI4<dag outs, dag ins, string asm, list<dag> pattern> + : ThumbI<outs, ins, AddrModeT4, Size2Bytes, asm, "", pattern>; +class TIs<dag outs, dag ins, string asm, list<dag> pattern> + : ThumbI<outs, ins, AddrModeTs, Size2Bytes, asm, "", pattern>; + +// Two-address instructions +class TIt<dag outs, dag ins, string asm, list<dag> pattern> + : ThumbI<outs, ins, AddrModeNone, Size2Bytes, asm, "$lhs = $dst", pattern>; + +// BL, BLX(1) are translated by assembler into two instructions +class TIx2<dag outs, dag ins, string asm, list<dag> pattern> + : ThumbI<outs, ins, AddrModeNone, Size4Bytes, asm, "", pattern>; + +// BR_JT instructions +class TJTI<dag outs, dag ins, string asm, list<dag> pattern> + : ThumbI<outs, ins, AddrModeNone, SizeSpecial, asm, "", pattern>; + + +//===----------------------------------------------------------------------===// + + +// ThumbPat - Same as Pat<>, but requires that the compiler be in Thumb mode. +class ThumbPat<dag pattern, dag result> : Pat<pattern, result> { + list<Predicate> Predicates = [IsThumb]; +} + +class ThumbV5Pat<dag pattern, dag result> : Pat<pattern, result> { + list<Predicate> Predicates = [IsThumb, HasV5T]; +} |