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authorLogan Chien <loganchien@google.com>2011-12-16 09:08:45 +0800
committerLogan Chien <loganchien@google.com>2011-12-16 13:28:58 +0800
commita1e6e241a813f81be2d2f36ab60c950ca297574b (patch)
treecf2d7ec5c63f40e2b66d8be7737496719a0d7902 /lib/Target/ARM/ARMInstrFormats.td
parentac212abcc6d858470ad35ce7d660af0c1800364a (diff)
parentddecfe54a35ffbe0675f7f33e493734fd60b2495 (diff)
downloadexternal_llvm-a1e6e241a813f81be2d2f36ab60c950ca297574b.zip
external_llvm-a1e6e241a813f81be2d2f36ab60c950ca297574b.tar.gz
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Merge with LLVM upstream r146714 (Dec 16th 2011)
Change-Id: Ied458adb08bf9a69250cbcee9b14b44d17e8701a
Diffstat (limited to 'lib/Target/ARM/ARMInstrFormats.td')
-rw-r--r--lib/Target/ARM/ARMInstrFormats.td192
1 files changed, 123 insertions, 69 deletions
diff --git a/lib/Target/ARM/ARMInstrFormats.td b/lib/Target/ARM/ARMInstrFormats.td
index 6940156..80f3773 100644
--- a/lib/Target/ARM/ARMInstrFormats.td
+++ b/lib/Target/ARM/ARMInstrFormats.td
@@ -201,21 +201,29 @@ def msr_mask : Operand<i32> {
// 16 imm6<5:4> = '01', 16 - <imm> is encoded in imm6<3:0>
// 32 imm6<5> = '1', 32 - <imm> is encoded in imm6<4:0>
// 64 64 - <imm> is encoded in imm6<5:0>
+def shr_imm8_asm_operand : ImmAsmOperand { let Name = "ShrImm8"; }
def shr_imm8 : Operand<i32> {
let EncoderMethod = "getShiftRight8Imm";
let DecoderMethod = "DecodeShiftRight8Imm";
+ let ParserMatchClass = shr_imm8_asm_operand;
}
+def shr_imm16_asm_operand : ImmAsmOperand { let Name = "ShrImm16"; }
def shr_imm16 : Operand<i32> {
let EncoderMethod = "getShiftRight16Imm";
let DecoderMethod = "DecodeShiftRight16Imm";
+ let ParserMatchClass = shr_imm16_asm_operand;
}
+def shr_imm32_asm_operand : ImmAsmOperand { let Name = "ShrImm32"; }
def shr_imm32 : Operand<i32> {
let EncoderMethod = "getShiftRight32Imm";
let DecoderMethod = "DecodeShiftRight32Imm";
+ let ParserMatchClass = shr_imm32_asm_operand;
}
+def shr_imm64_asm_operand : ImmAsmOperand { let Name = "ShrImm64"; }
def shr_imm64 : Operand<i32> {
let EncoderMethod = "getShiftRight64Imm";
let DecoderMethod = "DecodeShiftRight64Imm";
+ let ParserMatchClass = shr_imm64_asm_operand;
}
//===----------------------------------------------------------------------===//
@@ -231,6 +239,14 @@ class VFP2InstAlias<string Asm, dag Result, bit Emit = 0b1>
: InstAlias<Asm, Result, Emit>, Requires<[HasVFP2]>;
class VFP3InstAlias<string Asm, dag Result, bit Emit = 0b1>
: InstAlias<Asm, Result, Emit>, Requires<[HasVFP3]>;
+class NEONInstAlias<string Asm, dag Result, bit Emit = 0b1>
+ : InstAlias<Asm, Result, Emit>, Requires<[HasNEON]>;
+
+
+class VFP2MnemonicAlias<string src, string dst> : MnemonicAlias<src, dst>,
+ Requires<[HasVFP2]>;
+class NEONMnemonicAlias<string src, string dst> : MnemonicAlias<src, dst>,
+ Requires<[HasNEON]>;
//===----------------------------------------------------------------------===//
// ARM Instruction templates.
@@ -1994,73 +2010,111 @@ class NEONFPPat<dag pattern, dag result> : Pat<pattern, result> {
// VFP/NEON Instruction aliases for type suffices.
class VFPDataTypeInstAlias<string opc, string dt, string asm, dag Result> :
- InstAlias<!strconcat(opc, dt, asm), Result>;
-multiclass VFPDT8ReqInstAlias<string opc, string asm, dag Result> {
- def I8 : VFPDataTypeInstAlias<opc, ".i8", asm, Result>;
- def S8 : VFPDataTypeInstAlias<opc, ".s8", asm, Result>;
- def U8 : VFPDataTypeInstAlias<opc, ".u8", asm, Result>;
- def F8 : VFPDataTypeInstAlias<opc, ".p8", asm, Result>;
-}
-// VFPDT8ReqInstAlias plus plain ".8"
-multiclass VFPDT8InstAlias<string opc, string asm, dag Result> {
- def _8 : VFPDataTypeInstAlias<opc, ".8", asm, Result>;
- defm : VFPDT8ReqInstAlias<opc, asm, Result>;
-}
-multiclass VFPDT16ReqInstAlias<string opc, string asm, dag Result> {
- def I16 : VFPDataTypeInstAlias<opc, ".i16", asm, Result>;
- def S16 : VFPDataTypeInstAlias<opc, ".s16", asm, Result>;
- def U16 : VFPDataTypeInstAlias<opc, ".u16", asm, Result>;
- def F16 : VFPDataTypeInstAlias<opc, ".p16", asm, Result>;
-}
-// VFPDT16ReqInstAlias plus plain ".16"
-multiclass VFPDT16InstAlias<string opc, string asm, dag Result> {
- def _16 : VFPDataTypeInstAlias<opc, ".16", asm, Result>;
- defm : VFPDT16ReqInstAlias<opc, asm, Result>;
-}
-multiclass VFPDT32ReqInstAlias<string opc, string asm, dag Result> {
- def I32 : VFPDataTypeInstAlias<opc, ".i32", asm, Result>;
- def S32 : VFPDataTypeInstAlias<opc, ".s32", asm, Result>;
- def U32 : VFPDataTypeInstAlias<opc, ".u32", asm, Result>;
- def F32 : VFPDataTypeInstAlias<opc, ".f32", asm, Result>;
- def F : VFPDataTypeInstAlias<opc, ".f", asm, Result>;
-}
-// VFPDT32ReqInstAlias plus plain ".32"
-multiclass VFPDT32InstAlias<string opc, string asm, dag Result> {
- def _32 : VFPDataTypeInstAlias<opc, ".32", asm, Result>;
- defm : VFPDT32ReqInstAlias<opc, asm, Result>;
-}
-multiclass VFPDT64ReqInstAlias<string opc, string asm, dag Result> {
- def I64 : VFPDataTypeInstAlias<opc, ".i64", asm, Result>;
- def S64 : VFPDataTypeInstAlias<opc, ".s64", asm, Result>;
- def U64 : VFPDataTypeInstAlias<opc, ".u64", asm, Result>;
- def F64 : VFPDataTypeInstAlias<opc, ".f64", asm, Result>;
- def D : VFPDataTypeInstAlias<opc, ".d", asm, Result>;
-}
-// VFPDT64ReqInstAlias plus plain ".64"
-multiclass VFPDT64InstAlias<string opc, string asm, dag Result> {
- def _64 : VFPDataTypeInstAlias<opc, ".64", asm, Result>;
- defm : VFPDT64ReqInstAlias<opc, asm, Result>;
-}
-multiclass VFPDT64NoF64ReqInstAlias<string opc, string asm, dag Result> {
- def I64 : VFPDataTypeInstAlias<opc, ".i64", asm, Result>;
- def S64 : VFPDataTypeInstAlias<opc, ".s64", asm, Result>;
- def U64 : VFPDataTypeInstAlias<opc, ".u64", asm, Result>;
- def D : VFPDataTypeInstAlias<opc, ".d", asm, Result>;
-}
-// VFPDT64ReqInstAlias plus plain ".64"
-multiclass VFPDT64NoF64InstAlias<string opc, string asm, dag Result> {
- def _64 : VFPDataTypeInstAlias<opc, ".64", asm, Result>;
- defm : VFPDT64ReqInstAlias<opc, asm, Result>;
-}
+ InstAlias<!strconcat(opc, dt, "\t", asm), Result>, Requires<[HasVFP2]>;
+
multiclass VFPDTAnyInstAlias<string opc, string asm, dag Result> {
- defm : VFPDT8InstAlias<opc, asm, Result>;
- defm : VFPDT16InstAlias<opc, asm, Result>;
- defm : VFPDT32InstAlias<opc, asm, Result>;
- defm : VFPDT64InstAlias<opc, asm, Result>;
-}
-multiclass VFPDTAnyNoF64InstAlias<string opc, string asm, dag Result> {
- defm : VFPDT8InstAlias<opc, asm, Result>;
- defm : VFPDT16InstAlias<opc, asm, Result>;
- defm : VFPDT32InstAlias<opc, asm, Result>;
- defm : VFPDT64NoF64InstAlias<opc, asm, Result>;
-}
+ def : VFPDataTypeInstAlias<opc, ".8", asm, Result>;
+ def : VFPDataTypeInstAlias<opc, ".16", asm, Result>;
+ def : VFPDataTypeInstAlias<opc, ".32", asm, Result>;
+ def : VFPDataTypeInstAlias<opc, ".64", asm, Result>;
+}
+
+// The same alias classes using AsmPseudo instead, for the more complex
+// stuff in NEON that InstAlias can't quite handle.
+// Note that we can't use anonymous defm references here like we can
+// above, as we care about the ultimate instruction enum names generated, unlike
+// for instalias defs.
+class NEONDataTypeAsmPseudoInst<string opc, string dt, string asm, dag iops> :
+ AsmPseudoInst<!strconcat(opc, dt, "\t", asm), iops>, Requires<[HasNEON]>;
+multiclass NEONDT8ReqAsmPseudoInst<string opc, string asm, dag iops> {
+ def I8 : NEONDataTypeAsmPseudoInst<opc, ".i8", asm, iops>;
+ def S8 : NEONDataTypeAsmPseudoInst<opc, ".s8", asm, iops>;
+ def U8 : NEONDataTypeAsmPseudoInst<opc, ".u8", asm, iops>;
+ def P8 : NEONDataTypeAsmPseudoInst<opc, ".p8", asm, iops>;
+}
+// NEONDT8ReqAsmPseudoInst plus plain ".8"
+multiclass NEONDT8AsmPseudoInst<string opc, string asm, dag iops> {
+ def _8 : NEONDataTypeAsmPseudoInst<opc, ".8", asm, iops>;
+ defm _ : NEONDT8ReqAsmPseudoInst<opc, asm, iops>;
+}
+multiclass NEONDT16ReqAsmPseudoInst<string opc, string asm, dag iops> {
+ def I16 : NEONDataTypeAsmPseudoInst<opc, ".i16", asm, iops>;
+ def S16 : NEONDataTypeAsmPseudoInst<opc, ".s16", asm, iops>;
+ def U16 : NEONDataTypeAsmPseudoInst<opc, ".u16", asm, iops>;
+ def P16 : NEONDataTypeAsmPseudoInst<opc, ".p16", asm, iops>;
+}
+// NEONDT16ReqAsmPseudoInst plus plain ".16"
+multiclass NEONDT16AsmPseudoInst<string opc, string asm, dag iops> {
+ def _16 : NEONDataTypeAsmPseudoInst<opc, ".16", asm, iops>;
+ defm _ : NEONDT16ReqAsmPseudoInst<opc, asm, iops>;
+}
+multiclass NEONDT32ReqAsmPseudoInst<string opc, string asm, dag iops> {
+ def I32 : NEONDataTypeAsmPseudoInst<opc, ".i32", asm, iops>;
+ def S32 : NEONDataTypeAsmPseudoInst<opc, ".s32", asm, iops>;
+ def U32 : NEONDataTypeAsmPseudoInst<opc, ".u32", asm, iops>;
+ def F32 : NEONDataTypeAsmPseudoInst<opc, ".f32", asm, iops>;
+ def F : NEONDataTypeAsmPseudoInst<opc, ".f", asm, iops>;
+}
+// NEONDT32ReqAsmPseudoInst plus plain ".32"
+multiclass NEONDT32AsmPseudoInst<string opc, string asm, dag iops> {
+ def _32 : NEONDataTypeAsmPseudoInst<opc, ".32", asm, iops>;
+ defm _ : NEONDT32ReqAsmPseudoInst<opc, asm, iops>;
+}
+multiclass NEONDT64ReqAsmPseudoInst<string opc, string asm, dag iops> {
+ def I64 : NEONDataTypeAsmPseudoInst<opc, ".i64", asm, iops>;
+ def S64 : NEONDataTypeAsmPseudoInst<opc, ".s64", asm, iops>;
+ def U64 : NEONDataTypeAsmPseudoInst<opc, ".u64", asm, iops>;
+ def F64 : NEONDataTypeAsmPseudoInst<opc, ".f64", asm, iops>;
+ def D : NEONDataTypeAsmPseudoInst<opc, ".d", asm, iops>;
+}
+// NEONDT64ReqAsmPseudoInst plus plain ".64"
+multiclass NEONDT64AsmPseudoInst<string opc, string asm, dag iops> {
+ def _64 : NEONDataTypeAsmPseudoInst<opc, ".64", asm, iops>;
+ defm _ : NEONDT64ReqAsmPseudoInst<opc, asm, iops>;
+}
+multiclass NEONDT64NoF64ReqAsmPseudoInst<string opc, string asm, dag iops> {
+ def I64 : NEONDataTypeAsmPseudoInst<opc, ".i64", asm, iops>;
+ def S64 : NEONDataTypeAsmPseudoInst<opc, ".s64", asm, iops>;
+ def U64 : NEONDataTypeAsmPseudoInst<opc, ".u64", asm, iops>;
+ def D : NEONDataTypeAsmPseudoInst<opc, ".d", asm, iops>;
+}
+// NEONDT64ReqAsmPseudoInst plus plain ".64"
+multiclass NEONDT64NoF64AsmPseudoInst<string opc, string asm, dag iops> {
+ def _64 : NEONDataTypeAsmPseudoInst<opc, ".64", asm, iops>;
+ defm _ : NEONDT64ReqAsmPseudoInst<opc, asm, iops>;
+}
+multiclass NEONDTAnyAsmPseudoInst<string opc, string asm, dag iops> {
+ defm _ : NEONDT8AsmPseudoInst<opc, asm, iops>;
+ defm _ : NEONDT16AsmPseudoInst<opc, asm, iops>;
+ defm _ : NEONDT32AsmPseudoInst<opc, asm, iops>;
+ defm _ : NEONDT64AsmPseudoInst<opc, asm, iops>;
+}
+multiclass NEONDTAnyNoF64AsmPseudoInst<string opc, string asm, dag iops> {
+ defm _ : NEONDT8AsmPseudoInst<opc, asm, iops>;
+ defm _ : NEONDT16AsmPseudoInst<opc, asm, iops>;
+ defm _ : NEONDT32AsmPseudoInst<opc, asm, iops>;
+ defm _ : NEONDT64NoF64AsmPseudoInst<opc, asm, iops>;
+}
+
+// Data type suffix token aliases. Implements Table A7-3 in the ARM ARM.
+def : TokenAlias<".s8", ".i8">;
+def : TokenAlias<".u8", ".i8">;
+def : TokenAlias<".s16", ".i16">;
+def : TokenAlias<".u16", ".i16">;
+def : TokenAlias<".s32", ".i32">;
+def : TokenAlias<".u32", ".i32">;
+def : TokenAlias<".s64", ".i64">;
+def : TokenAlias<".u64", ".i64">;
+
+def : TokenAlias<".i8", ".8">;
+def : TokenAlias<".i16", ".16">;
+def : TokenAlias<".i32", ".32">;
+def : TokenAlias<".i64", ".64">;
+
+def : TokenAlias<".p8", ".8">;
+def : TokenAlias<".p16", ".16">;
+
+def : TokenAlias<".f32", ".32">;
+def : TokenAlias<".f64", ".64">;
+def : TokenAlias<".f", ".f32">;
+def : TokenAlias<".d", ".f64">;