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authorJim Grosbach <grosbach@apple.com>2011-09-08 01:01:32 +0000
committerJim Grosbach <grosbach@apple.com>2011-09-08 01:01:32 +0000
commite64fb28da191bc978ab99ea397e6108a15c364f8 (patch)
tree9e0419f0ad59df62c7456e568a88cc410aead36c /lib/Target/ARM/ARMInstrFormats.td
parenteeec025cf5a2236ee9527a3312496a6ea42100c6 (diff)
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Thumb2 assembly parsing and encoding for LDR post-indexed.
More cleanup of the general indexed addressing T2 instructions. Still more to do, especially for stores. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139272 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/ARMInstrFormats.td')
-rw-r--r--lib/Target/ARM/ARMInstrFormats.td6
1 files changed, 3 insertions, 3 deletions
diff --git a/lib/Target/ARM/ARMInstrFormats.td b/lib/Target/ARM/ARMInstrFormats.td
index b51887d..9387cf0 100644
--- a/lib/Target/ARM/ARMInstrFormats.td
+++ b/lib/Target/ARM/ARMInstrFormats.td
@@ -1207,7 +1207,7 @@ class T2Ipostldst<bit signed, bits<2> opcod, bit load, bit pre,
bits<4> Rt;
bits<4> Rn;
- bits<9> addr;
+ bits<9> offset;
let Inst{31-27} = 0b11111;
let Inst{26-25} = 0b00;
let Inst{24} = signed;
@@ -1219,9 +1219,9 @@ class T2Ipostldst<bit signed, bits<2> opcod, bit load, bit pre,
let Inst{11} = 1;
// (P, W) = (1, 1) Pre-indexed or (0, 1) Post-indexed
let Inst{10} = pre; // The P bit.
- let Inst{9} = addr{8}; // Sign bit
+ let Inst{9} = offset{8}; // Sign bit
let Inst{8} = 1; // The W bit.
- let Inst{7-0} = addr{7-0};
+ let Inst{7-0} = offset{7-0};
}
// Tv5Pat - Same as Pat<>, but requires V5T Thumb mode.