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authorBob Wilson <bob.wilson@apple.com>2009-06-22 23:27:02 +0000
committerBob Wilson <bob.wilson@apple.com>2009-06-22 23:27:02 +0000
commite60fee02ce7c1ee34faeefde46229b4168c2fd7f (patch)
tree79bd2abbc5253e6f00db07023cf7d829cbcdee5a /lib/Target/ARM/ARMInstrInfo.cpp
parentb23c1be77d31d56cae68be62602c371a1d436a2a (diff)
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Add support for ARM's Advanced SIMD (NEON) instruction set.
This is still a work in progress but most of the NEON instruction set is supported. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73919 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/ARMInstrInfo.cpp')
-rw-r--r--lib/Target/ARM/ARMInstrInfo.cpp8
1 files changed, 8 insertions, 0 deletions
diff --git a/lib/Target/ARM/ARMInstrInfo.cpp b/lib/Target/ARM/ARMInstrInfo.cpp
index d19fb8e..e8da927 100644
--- a/lib/Target/ARM/ARMInstrInfo.cpp
+++ b/lib/Target/ARM/ARMInstrInfo.cpp
@@ -59,6 +59,8 @@ bool ARMInstrInfo::isMoveInstr(const MachineInstr &MI,
return false;
case ARM::FCPYS:
case ARM::FCPYD:
+ case ARM::VMOVD:
+ case ARM::VMOVQ:
SrcReg = MI.getOperand(1).getReg();
DstReg = MI.getOperand(0).getReg();
return true;
@@ -528,6 +530,8 @@ bool ARMInstrInfo::copyRegToReg(MachineBasicBlock &MBB,
else if (DestRC == ARM::DPRRegisterClass)
AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::FCPYD), DestReg)
.addReg(SrcReg));
+ else if (DestRC == ARM::QPRRegisterClass)
+ BuildMI(MBB, I, DL, get(ARM::VMOVQ), DestReg).addReg(SrcReg);
else
return false;
@@ -844,6 +848,10 @@ canFoldMemoryOperand(const MachineInstr *MI,
case ARM::FCPYS:
case ARM::FCPYD:
return true;
+
+ case ARM::VMOVD:
+ case ARM::VMOVQ:
+ return false; // FIXME
}
return false;