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| author | Joel Jones <joel_k_jones@apple.com> | 2012-07-13 23:25:25 +0000 |
|---|---|---|
| committer | Joel Jones <joel_k_jones@apple.com> | 2012-07-13 23:25:25 +0000 |
| commit | 06a6a300c5f7100e4665667c689369e078d2ad59 (patch) | |
| tree | f521fdce2377d82a92551246d1519630814ca136 /lib/Target/ARM/ARMInstrNEON.td | |
| parent | cb41e5f6f28da51e37eb072e4bf69143fe29dacc (diff) | |
| download | external_llvm-06a6a300c5f7100e4665667c689369e078d2ad59.zip external_llvm-06a6a300c5f7100e4665667c689369e078d2ad59.tar.gz external_llvm-06a6a300c5f7100e4665667c689369e078d2ad59.tar.bz2 | |
This is one of the first steps at moving to replace target-dependent
intrinsics with target-indepdent intrinsics. The first instruction(s) to be
handled are the vector versions of count leading zeros (ctlz).
The changes here are to clang so that it generates a target independent
vector ctlz when it sees an ARM dependent vector ctlz. The changes in llvm
are to match the target independent vector ctlz and in VMCore/AutoUpgrade.cpp
to update any existing bc files containing ARM dependent vector ctlzs with
target-independent ctlzs. There are also changes to an existing test case in
llvm for ARM vector count instructions and a new test for the bitcode upgrade.
<rdar://problem/11831778>
There is deliberately no test for the change to clang, as so far as I know, no
consensus has been reached regarding how to test neon instructions in clang;
q.v. <rdar://problem/8762292>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160200 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/ARMInstrNEON.td')
| -rw-r--r-- | lib/Target/ARM/ARMInstrNEON.td | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/Target/ARM/ARMInstrNEON.td b/lib/Target/ARM/ARMInstrNEON.td index 404b3ad..c540d0d 100644 --- a/lib/Target/ARM/ARMInstrNEON.td +++ b/lib/Target/ARM/ARMInstrNEON.td @@ -4825,7 +4825,7 @@ defm VCLS : N2VInt_QHS<0b11, 0b11, 0b00, 0b01000, 0, // VCLZ : Vector Count Leading Zeros defm VCLZ : N2VInt_QHS<0b11, 0b11, 0b00, 0b01001, 0, IIC_VCNTiD, IIC_VCNTiQ, "vclz", "i", - int_arm_neon_vclz>; + ctlz>; // VCNT : Vector Count One Bits def VCNTd : N2VDInt<0b11, 0b11, 0b00, 0b00, 0b01010, 0, IIC_VCNTiD, "vcnt", "8", |