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| author | Tim Northover <tnorthover@apple.com> | 2013-07-03 09:20:36 +0000 |
|---|---|---|
| committer | Tim Northover <tnorthover@apple.com> | 2013-07-03 09:20:36 +0000 |
| commit | a10c01a6c62792be825c562314a646437b21bfec (patch) | |
| tree | 63c3600a8c347945f32732f94407ed65a2734404 /lib/Target/ARM/ARMInstrThumb.td | |
| parent | b997b56383a99f739d7e2aa14e6945fea477e597 (diff) | |
| download | external_llvm-a10c01a6c62792be825c562314a646437b21bfec.zip external_llvm-a10c01a6c62792be825c562314a646437b21bfec.tar.gz external_llvm-a10c01a6c62792be825c562314a646437b21bfec.tar.bz2 | |
ARM: relax the atomic release barrier to "dmb ishst" on Swift
Swift cores implement store barriers that are stronger than the ARM
specification but weaker than general barriers. They are, in fact, just about
enough to provide the ordering needed for atomic operations with release
semantics.
This patch makes use of that quirk.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185527 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/ARMInstrThumb.td')
0 files changed, 0 insertions, 0 deletions